From patchwork Fri Apr 19 21:17:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carl Love X-Patchwork-Id: 88769 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BAE56384640E for ; Fri, 19 Apr 2024 21:18:50 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:470:142:3::10]) by sourceware.org (Postfix) with ESMTPS id C15DB3849AF1 for ; Fri, 19 Apr 2024 21:18:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C15DB3849AF1 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=linux.ibm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org C15DB3849AF1 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:470:142:3::10 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1713561487; cv=none; b=AC14HB2eNtk6GgODXanlr+X20ZSJaRwwEEwVZTyoBxkBuOjf10N5iFG1mNlfkHPHBHsho/g1sR8h5BZTJlT8JXV1/EAn0fwHbmAT+9lL8beUWEAqbWhnoRB0nYMJ2fV49HfzlZvyNtVyYSwcr1wzbR2bYmOt2+nsBdBcYAYeSk8= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1713561487; c=relaxed/simple; bh=eFQSe3HmX2k+opowRxENEzRsTuY5D3DekayoeYQp6zY=; h=DKIM-Signature:Message-ID:Date:MIME-Version:Subject:To:From; b=TcTHvJ4r+fDB9tYdK6tbxzR12P6IfPq01EMdS4+XmGLznuSmg48ig1L2lwAy/+SYCvf+Kdvn0rm0YNLFs2AnVTlBSM1zo6QzRnPEkthCeNEJkbgmff2mzyNtFrsjs01s8RPBRTsGkwgYSwrUqG937DkPptrnPJ8s/yNRqiPZwFc= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rxvcQ-0001mZ-NE for gcc-patches@gcc.gnu.org; Fri, 19 Apr 2024 17:18:04 -0400 Received: from pps.filterd (m0353726.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 43JLCNFe005422; Fri, 19 Apr 2024 21:18:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : subject : to : references : from : in-reply-to : content-type : content-transfer-encoding; s=pp1; bh=je2ewmRYkqcwUcm+WdRZIBql2Om5JrftEoM82oAckXE=; b=g37dHz2hMDDQVInQZWsNt7MVlCgnO7Qifp51VZ7pRV337sdylOcvZP1ix4Y8xOs2pv40 k4LRmbvgCQN8F4Xla7R7rY+IAi5wsK6o5hyWK3UbE/GfdP9TSQLELuwfMMKqmrR4VJlW KQFAE3Y7dwCvxu5PqKqqwNUG/0rXPsSIgsHo0NgANHB94dQrQ2oGpzfmtF9IbDWcIK2n 7Rufrbc3QLdsh17ZBsJuvM+66hMZqxdT9QzFfguZ6SpD3OqM4Xr09CecWmj71kTU1wsu NMqJx4C/yb577ArsHafko5/t6VOP2MH3iQAsSivyUdtQiBXezwsdJreuXVfTHslVcD5g YA== Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3xm0ap0092-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Apr 2024 21:18:00 +0000 Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 43JINGkL027842; Fri, 19 Apr 2024 21:17:59 GMT Received: from smtprelay05.dal12v.mail.ibm.com ([172.16.1.7]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 3xkbmpe326-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Apr 2024 21:17:59 +0000 Received: from smtpav04.wdc07v.mail.ibm.com (smtpav04.wdc07v.mail.ibm.com [10.39.53.231]) by smtprelay05.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 43JLHuEO66978174 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 19 Apr 2024 21:17:58 GMT Received: from smtpav04.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1FD7858050; Fri, 19 Apr 2024 21:17:56 +0000 (GMT) Received: from smtpav04.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 65DD658045; Fri, 19 Apr 2024 21:17:55 +0000 (GMT) Received: from [9.67.133.93] (unknown [9.67.133.93]) by smtpav04.wdc07v.mail.ibm.com (Postfix) with ESMTP; Fri, 19 Apr 2024 21:17:55 +0000 (GMT) Message-ID: <509f5ca2-3a32-42e1-b653-7777ccd2d6d3@linux.ibm.com> Date: Fri, 19 Apr 2024 14:17:55 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 6/13] rs6000, add overloaded vec_sel with int128 arguments Content-Language: en-US To: gcc-patches@gcc.gnu.org, "bergner@linux.ibm.com" , Segher Boessenkool , "Kewen.Lin" References: <6378d560-df55-4b75-be7b-93dc6b85d81a@linux.ibm.com> From: Carl Love In-Reply-To: <6378d560-df55-4b75-be7b-93dc6b85d81a@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: zSJuEztf-qJU3m3DI00LJsrDOtDj0Do3 X-Proofpoint-ORIG-GUID: zSJuEztf-qJU3m3DI00LJsrDOtDj0Do3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-19_15,2024-04-19_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 mlxscore=0 spamscore=0 impostorscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 malwarescore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2404010000 definitions=main-2404190165 Received-SPF: pass client-ip=148.163.156.1; envelope-from=cel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_PASS, SPF_SOFTFAIL, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org rs6000, add overloaded vec_sel with int128 arguments Extend the vec_sel built-in to take three signed/unsigned int128 arguments and return a signed/unsigned int128 result. Extending the vec_sel built-in makes the existing buit-ins __builtin_vsx_xxsel_1ti and __builtin_vsx_xxsel_1ti_uns obsolete. The patch removes these built-ins. The patch adds documentation and test cases for the new overloaded vec_sel built-ins. gcc/ChangeLog: * config/rs6000/rs6000-builtins.def (__builtin_vsx_xxsel_1ti, __builtin_vsx_xxsel_1ti_uns): Remove built-in definitions. * config/rs6000/rs6000-overload.def (vec_sel): Add new overloaded definitions. * doc/extend.texi: Add documentation for new vec_sel arguments. gcc/testsuite/ChangeLog: * gcc.target/powerpc/vec_sel_runnable-int128.c: New test file. --- gcc/config/rs6000/rs6000-builtins.def | 6 -- gcc/config/rs6000/rs6000-overload.def | 4 + gcc/doc/extend.texi | 14 ++++ .../powerpc/vec-sel-runnable-i128.c | 84 +++++++++++++++++++ 4 files changed, 102 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-sel-runnable-i128.c diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index d09e21a9151..46d2ae7b7cb 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -1931,12 +1931,6 @@ const vuc __builtin_vsx_xxsel_16qi_uns (vuc, vuc, vuc); XXSEL_16QI_UNS vector_select_v16qi_uns {} - const vsq __builtin_vsx_xxsel_1ti (vsq, vsq, vsq); - XXSEL_1TI vector_select_v1ti {} - - const vsq __builtin_vsx_xxsel_1ti_uns (vsq, vsq, vsq); - XXSEL_1TI_UNS vector_select_v1ti_uns {} - const vd __builtin_vsx_xxsel_2df (vd, vd, vd); XXSEL_2DF vector_select_v2df {} diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index 68501c05289..5912c9452f4 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -3274,6 +3274,10 @@ VSEL_2DF VSEL_2DF_B vd __builtin_vec_sel (vd, vd, vull); VSEL_2DF VSEL_2DF_U + vsq __builtin_vec_sel (vsq, vsq, vsq); + VSEL_1TI VSEL_1TI_S + vuq __builtin_vec_sel (vuq, vuq, vuq); + VSEL_1TI_UNS VSEL_1TI_U ; The following variants are deprecated. vsll __builtin_vec_sel (vsll, vsll, vsll); VSEL_2DI_B VSEL_2DI_S diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 64a43b55e2d..86b8e536dbe 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -23358,6 +23358,20 @@ The programmer is responsible for understanding the endianness issues involved with the first argument and the result. @findex vec_replace_unaligned +Vector select + +@smallexample +vector signed __int128 vec_sel (vector signed __int128, + vector signed __int128, vector signed __int128); +vector unsigned __int128 vec_sel (vector unsigned __int128, + vector unsigned __int128, vector unsigned __int128); +@end smallexample + +The overloaded built-in @code{vec_sel} with vector signed/unsigned __int128 +arguments and returns a vector selecting bits from the two source vectors based +on the values of the third input vector. This built-in is an extension of the +@code{vec_sel} built-in documented in the PVIPR. + Vector Shift Left Double Bit Immediate @smallexample @exdent vector signed char vec_sldb (vector signed char, vector signed char, diff --git a/gcc/testsuite/gcc.target/powerpc/vec-sel-runnable-i128.c b/gcc/testsuite/gcc.target/powerpc/vec-sel-runnable-i128.c new file mode 100644 index 00000000000..58eb383e8c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-sel-runnable-i128.c @@ -0,0 +1,84 @@ +/* { dg-do run { target power10_hw }} */ +/* { dg-require-effective-target int128 } */ +/* { dg-require-effective-target power10_hw } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ + + +#include + + +#define DEBUG 0 + +#if DEBUG +#include +void print_i128 (unsigned __int128 val) +{ + printf(" 0x%016llx%016llx", + (unsigned long long)(val >> 64), + (unsigned long long)(val & 0xFFFFFFFFFFFFFFFF)); +} +#endif + +extern void abort (void); + +int +main (int argc, char *argv []) +{ + vector signed __int128 src_va_s128; + vector signed __int128 src_vb_s128; + vector signed __int128 src_vc_s128; + vector signed __int128 vresult_s128; + vector signed __int128 expected_vresult_s128; + + vector unsigned __int128 src_va_u128; + vector unsigned __int128 src_vb_u128; + vector unsigned __int128 src_vc_u128; + vector unsigned __int128 vresult_u128; + vector unsigned __int128 expected_vresult_u128; + + src_va_s128 = (vector signed __int128) {0x123456789ABCDEF0}; + src_vb_s128 = (vector signed __int128) {0xFEDCBA9876543210}; + src_vc_s128 = (vector signed __int128) {0x3333333333333333}; + expected_vresult_s128 = (vector signed __int128) {0x32147658ba9cfed0}; + + /* Signed arguments. */ + vresult_s128 = vec_sel (src_va_s128, src_vb_s128, src_vc_s128); + + if (!vec_all_eq (vresult_s128, expected_vresult_s128)) +#if DEBUG + { + printf ("ERROR, vec_sel (src_va_s128, src_vb_s128, src_vc_s128) result does not match expected output.\n"); + printf (" Result: "); + print_i128 ((unsigned __int128) vresult_s128); + printf ("\n Expected result: "); + print_i128 ((unsigned __int128) expected_vresult_s128); + printf ("\n"); + } +#else + abort (); +#endif + + src_va_u128 = (vector unsigned __int128) {0x13579ACE02468BDF}; + src_vb_u128 = (vector unsigned __int128) {0xA987654FEDCB3210}; + src_vc_u128 = (vector unsigned __int128) {0x5555555555555555}; + expected_vresult_u128 = (vector unsigned __int128) {0x32147658ba9cfed0}; + + /* Unigned arguments. */ + vresult_u128 = vec_sel (src_va_u128, src_vb_u128, src_vc_u128); + + if (!vec_all_eq (vresult_u128, expected_vresult_u128)) +#if DEBUG + { + printf ("ERROR, vec_sel (src_va_u128, src_vb_u128, src_vc_u128) result does not match expected output.\n"); + printf (" Result: "); + print_i128 ((unsigned __int128) vresult_u128); + printf ("\n Expected result: "); + print_i128 ((unsigned __int128) expected_vresult_u128); + printf ("\n"); + } +#else + abort (); +#endif + + return 0; +}