From patchwork Wed Mar 30 17:14:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Makarov X-Patchwork-Id: 52477 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D27B53858C2D for ; Wed, 30 Mar 2022 17:15:09 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D27B53858C2D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1648660509; bh=hUUm6O+/m6XaU9/lV2PToFIgyjIuN+dtNpGakcZ6kSo=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=TJTJWRZlXQbFU142ibnrj6FwzjQyUI7RmRJzN7m/Vu2b34yq2CGq0ejLET+s2fxn5 KrHcdoZHdAXI5RvRP+aSJNyGRsW7YVsglq6wK1srd9zuHt/cr71qLOqsMWCUUfXeQR CNbZ8ByqTVESBDf/Y6TGgW96EFkHhDw4x4w04i3Q= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id 1A7D9385EC4E for ; Wed, 30 Mar 2022 17:14:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1A7D9385EC4E Received: from mail-qk1-f200.google.com (mail-qk1-f200.google.com [209.85.222.200]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-387-amTtgUWQORyXIRXXsIbxcA-1; Wed, 30 Mar 2022 13:14:14 -0400 X-MC-Unique: amTtgUWQORyXIRXXsIbxcA-1 Received: by mail-qk1-f200.google.com with SMTP id r11-20020a05620a03cb00b0067e0cd1c855so13001689qkm.4 for ; Wed, 30 Mar 2022 10:14:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent :content-language:to:from:subject; bh=eoabldbztuwFhIjflqO1A2gn3gp9fGVrQggmHicFVkA=; b=0i6b963XmwnctFR1e2An/yP7r0UUrwDvzqhe6V7Msubo6517ALPoKVbrBcL1XnloMx fg+Vo1lvJcqmvU1sD0BkFFc4uLFC3DbKCbbe4OseNU58nvZJ3KqUBHiJa7s4vc2x5YiB Eq77lWXzRd1PiSb3maZDuxQwVqZiOBMPuO2HqZYnQDdtltfcciSg4qF62/XRS0MuUkEQ n6FFmmj9xKlSkEAMMFLpy0ddGUTKzRsNopYCZZ12QGKJIyfuMUOUFakaBbXLQBNiA4JX H1+eOIdJl8XAZ+KoussOm+hadcb7LLxfUEseEI+bgFqJd10aExmPej34IQ5c/+mZSFes 8VtA== X-Gm-Message-State: AOAM531uA8PZgfj5q165WFlsQCeaPsYk772uZtqExXYIlQ4Tm6LZevI0 ilDSx/b2rHHVWmqrD3dzfzH/yJFOD0yVe5w4kxtXQj6DcS7+4tkcmeA+lz91LbWR0+xM1uLiCKd mZxtwyJtV/aZWiOIYpJFMlXAracDDM5BUcLgwyBRECwVhaMK1uv3pJPkOXs7H2eTv19wKWA== X-Received: by 2002:ac8:57d5:0:b0:2e0:70a8:4419 with SMTP id w21-20020ac857d5000000b002e070a84419mr509484qta.257.1648660453566; Wed, 30 Mar 2022 10:14:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwcZO7HzdIxEa1tmn9o9f7JgmHtejlovm/ll2jGWpVxQXwZ9M5a7Si7ikDzUmnCkVSaOFre0w== X-Received: by 2002:ac8:57d5:0:b0:2e0:70a8:4419 with SMTP id w21-20020ac857d5000000b002e070a84419mr509459qta.257.1648660453196; Wed, 30 Mar 2022 10:14:13 -0700 (PDT) Received: from [192.168.1.113] ([69.165.238.126]) by smtp.gmail.com with ESMTPSA id y24-20020a37e318000000b0067d43d76184sm10865253qki.97.2022.03.30.10.14.12 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Mar 2022 10:14:12 -0700 (PDT) Message-ID: <4a7d72ce-55db-3fe2-b08b-62960810a3ec@redhat.com> Date: Wed, 30 Mar 2022 13:14:11 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 To: "gcc-patches@gcc.gnu.org" Subject: [committed] [PR105032] LRA: modify loop condition to find reload insns for hard reg splitting X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Vladimir Makarov via Gcc-patches From: Vladimir Makarov Reply-To: Vladimir Makarov Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" The following patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105032 The patch was successfully bootstrapped and tested on x86-64. commit 25de4889c16fec80172a5e2d1825f3ff505d0cc4 Author: Vladimir N. Makarov Date: Wed Mar 30 13:03:44 2022 -0400 [PR105032] LRA: modify loop condition to find reload insns for hard reg splitting When trying to split hard reg live range to assign hard reg to a reload pseudo, LRA searches for reload insns of the reload pseudo assuming a specific order of the reload insns. This order is violated if reload involved in inheritance transformation. In such case, the loop used for reload insn searching can become infinite. The patch fixes this. gcc/ChangeLog: PR middle-end/105032 * lra-assigns.cc (find_reload_regno_insns): Modify loop condition. gcc/testsuite/ChangeLog: PR middle-end/105032 * gcc.target/i386/pr105032.c: New. diff --git a/gcc/lra-assigns.cc b/gcc/lra-assigns.cc index af30a673142..486e94f2006 100644 --- a/gcc/lra-assigns.cc +++ b/gcc/lra-assigns.cc @@ -1730,7 +1730,8 @@ find_reload_regno_insns (int regno, rtx_insn * &start, rtx_insn * &finish) { for (prev_insn = PREV_INSN (start_insn), next_insn = NEXT_INSN (start_insn); - insns_num != 1 && (prev_insn != NULL || next_insn != NULL); ) + insns_num != 1 && (prev_insn != NULL + || (next_insn != NULL && second_insn == NULL)); ) { if (prev_insn != NULL) { diff --git a/gcc/testsuite/gcc.target/i386/pr105032.c b/gcc/testsuite/gcc.target/i386/pr105032.c new file mode 100644 index 00000000000..57b21d3cd7a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr105032.c @@ -0,0 +1,36 @@ +/* { dg-do compile } */ +/* { dg-options "-w" } */ +/* { dg-additional-options "-m32" { target x86_64-*-* } } */ + +typedef unsigned int size_t; +__extension__ typedef long int __off_t; +typedef __off_t off_t; +static void *__sys_mmap(void *addr, size_t length, int prot, int flags, int fd, + off_t offset) +{ + offset >>= 12; + return (void *)({ long _ret; + register long _num asm("eax") = (192); + register long _arg1 asm("ebx") = (long)(addr); + register long _arg2 asm("ecx") = (long)(length); + register long _arg3 asm("edx") = (long)(prot); + register long _arg4 asm("esi") = (long)(flags); + register long _arg5 asm("edi") = (long)(fd); + long _arg6 = (long)(offset); + asm volatile ("pushl %[_arg6]\n\t" + "pushl %%ebp\n\t" + "movl 4(%%esp), %%ebp\n\t" + "int $0x80\n\t" + "popl %%ebp\n\t" + "addl $4,%%esp\n\t" + : "=a"(_ret) + : "r"(_num), "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4),"r"(_arg5), [_arg6]"m"(_arg6) + : "memory", "cc" ); + _ret; }); +} + +int main(void) +{ + __sys_mmap(((void *)0), 0x1000, 0x1 | 0x2, 0x20 | 0x02, -1, 0); + return 0; +}