From patchwork Mon Dec 13 19:12:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Makarov X-Patchwork-Id: 48882 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 458923858419 for ; Mon, 13 Dec 2021 19:12:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 458923858419 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1639422770; bh=ZojCyOrIl8R1WduGloFzklYVsKe+2bUxgcjKKE0OBNc=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=geAU4yHJJvebHgSwwhozWS97/sOEQ9NNKOIdZe7Nj3hVoC0MYRLNjnUn42VSSdcde l2j74ax9W+JufjIEMt4i0gHNPu8Kz0FrT0ZhI4BqN3/GZm5lPfVBmIq9fsA84xryIM XcZ8QMsIBAVJR/x8JUHI9YJbuB5llVYsU36iXz3w= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 4CC123858D39 for ; Mon, 13 Dec 2021 19:12:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4CC123858D39 Received: from mail-qt1-f197.google.com (mail-qt1-f197.google.com [209.85.160.197]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-106-RZi0p7wWPoahAPcWM2anrQ-1; Mon, 13 Dec 2021 14:12:16 -0500 X-MC-Unique: RZi0p7wWPoahAPcWM2anrQ-1 Received: by mail-qt1-f197.google.com with SMTP id o12-20020a05622a008c00b002aff5552c89so24151093qtw.23 for ; Mon, 13 Dec 2021 11:12:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent :content-language:from:subject:to; bh=dVRWEzG0GUaKSs8WB4km8texUrNbYGOkBin7lrLHB/U=; b=30OPQ5GEJw07Zi8Q+aMmvWDyR/KvDcj6w0Ldy1AWKxRavgAS+UpigNPREK8PnX8dYd WTIUFoEv2nR5gWEI10qJXTPy9jQhFM2064iTThv0sO3phlq0IsxJTAgKOMipNeOmIYyQ LypBxRTBsI4sMAtp7AUQsbBFQEKCajfksTD7l4PEII+IN64rejbTB0pg//0h6QNuYJ+p TyIhtr2+556/Qizt2fnTX4vhBXETkuvYLj8ofZwpY9ey5TV1VX9LJiVFhVqP2raQSk3I NO00N93D+U3Vm4XLXcKfVoOnekYSoVOscA4YHDfSeuxMAApPIOhHd9QAvst7VtCQU4mO 1zbA== X-Gm-Message-State: AOAM532/sCa4CLTpooM21Fuq9keAYEqINYIcvb5Q5JglYGh2jS7wrfR7 KeBXUt9D+9V+oNtbX/PxJ2Vp7/QgoA3k9MTY3i39SWuNICQeUjZWGE2LuJOG9yCnS69CMAuDX0y NldI0x/kQgZO6XVLBOFbr6yGXehqpgId88lEjyOti0eY3FethuLTNahpL36kCrw5TqNNfWQ== X-Received: by 2002:ac8:5bcc:: with SMTP id b12mr249685qtb.249.1639422736257; Mon, 13 Dec 2021 11:12:16 -0800 (PST) X-Google-Smtp-Source: ABdhPJw5mG3HFoXDuhTOBL2z7SWiZdr/O7mgL+EARlyRJWxfseU3gmNgvWwbGnp1UN5daa5u1iRQ8w== X-Received: by 2002:ac8:5bcc:: with SMTP id b12mr249640qtb.249.1639422735954; Mon, 13 Dec 2021 11:12:15 -0800 (PST) Received: from [192.168.1.113] ([69.165.238.126]) by smtp.gmail.com with ESMTPSA id a38sm6245419qkp.80.2021.12.13.11.12.15 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 13 Dec 2021 11:12:15 -0800 (PST) Message-ID: <33833f83-4941-d859-1ca3-f879425708da@redhat.com> Date: Mon, 13 Dec 2021 14:12:14 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: [committed][PR99531] IRA:Modify pseudo class cost calculation when processing move involving the pseudo and a hard register To: "gcc-patches@gcc.gnu.org" X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Vladimir Makarov via Gcc-patches From: Vladimir Makarov Reply-To: Vladimir Makarov Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" The following patch solves https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99531 The patch was successfully bootstrapped and tested on x86-64, aarch64, and ppc64. After some observation, if all is ok, I will commit the patch into gcc release branches mentioned in the PR. [PR99531] Modify pseudo class cost calculation when processing move involving the pseudo and a hard register Pseudo class calculated on the 1st iteration should not have a special treatment in cost calculation when processing move involving the pseudo and a hard register. gcc/ChangeLog: PR target/99531 * ira-costs.c (record_operand_costs): Do not take pseudo class calculated on the 1st iteration into account when processing move involving the pseudo and a hard register. gcc/testsuite/ChangeLog: PR target/99531 * gcc.target/i386/pr99531.c: New test. diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c index cb5ca8bc21b..d7191dcee3e 100644 --- a/gcc/ira-costs.c +++ b/gcc/ira-costs.c @@ -1310,7 +1310,7 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref) machine_mode mode = GET_MODE (SET_SRC (set)); cost_classes_t cost_classes_ptr = regno_cost_classes[regno]; enum reg_class *cost_classes = cost_classes_ptr->classes; - reg_class_t rclass, hard_reg_class, pref_class, bigger_hard_reg_class; + reg_class_t rclass, hard_reg_class, bigger_hard_reg_class; int cost, k; move_table *move_costs; bool dead_p = find_regno_note (insn, REG_DEAD, REGNO (src)); @@ -1336,23 +1336,6 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref) : move_costs[rclass][hard_reg_class]); op_costs[i]->cost[k] = cost * frequency; - /* If we have assigned a class to this allocno in our - first pass, add a cost to this alternative - corresponding to what we would add if this allocno - were not in the appropriate class. */ - if (pref) - { - if ((pref_class = pref[COST_INDEX (regno)]) == NO_REGS) - op_costs[i]->cost[k] - += ((i == 0 ? ira_memory_move_cost[mode][rclass][0] : 0) - + (i == 1 ? ira_memory_move_cost[mode][rclass][1] : 0) - * frequency); - else if (ira_reg_class_intersect[pref_class][rclass] - == NO_REGS) - op_costs[i]->cost[k] - += (move_costs[pref_class][rclass] - * frequency); - } /* If this insn is a single set copying operand 1 to operand 0 and one operand is an allocno with the other a hard reg or an allocno that prefers a hard @@ -1378,9 +1361,6 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref) } op_costs[i]->mem_cost = ira_memory_move_cost[mode][hard_reg_class][i] * frequency; - if (pref && (pref_class = pref[COST_INDEX (regno)]) != NO_REGS) - op_costs[i]->mem_cost - += ira_memory_move_cost[mode][pref_class][i] * frequency; return; } } diff --git a/gcc/testsuite/gcc.target/i386/pr99531.c b/gcc/testsuite/gcc.target/i386/pr99531.c new file mode 100644 index 00000000000..0e1a08b7c77 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr99531.c @@ -0,0 +1,7 @@ +/* { dg-do compile { target { x86_64-*-linux* } } } */ +/* { dg-options "-O2" } */ + +int func(int, int, int, int, int, int); +int caller(int a, int b, int c, int d, int e) { return func(0, a, b, c, d, e); } + +/* { dg-final { scan-assembler-not "push" } } */