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Thu, 23 Dec 2021 02:09:30 +0000 (GMT) Subject: [PATCH] rs6000: Disable MMA if no P9 VECTOR support [PR103627] To: GCC Patches Message-ID: <25e731db-6177-6f20-5f04-0a98d3ac39f8@linux.ibm.com> Date: Thu, 23 Dec 2021 10:09:27 +0800 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.10.0 MIME-Version: 1.0 Content-Language: en-US X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: WNtb03P8r9AjGVTVuTk9jnxShqjc8GJk X-Proofpoint-GUID: Gvfmq96j35nY_ZCxWJKARQQgu94LzbC5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-22_09,2021-12-22_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 mlxscore=0 clxscore=1015 malwarescore=0 mlxlogscore=980 lowpriorityscore=0 priorityscore=1501 bulkscore=0 spamscore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112230008 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Kewen.Lin via Gcc-patches" From: "Kewen.Lin" Reply-To: "Kewen.Lin" Cc: Peter Bergner , Bill Schmidt , David Edelsohn , Segher Boessenkool Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, As PR103627 shows, there is an unexpected case where !TARGET_VSX and TARGET_MMA co-exist. As ISA3.1 claims, SIMD is a requirement for MMA. By looking into the ICE, I noticed that the current MMA implementation depends on vector pairs load/store, but since we don't have a separated option to control Power10 vector, this patch is to check for Power9 vector instead. Bootstrapped and regtested on powerpc64le-linux-gnu P9 and powerpc64-linux-gnu P8. Is it ok for trunk? BR, Kewen ----- gcc/ChangeLog: PR target/103627 * config/rs6000/rs6000.c (rs6000_option_override_internal): Disable MMA if !TARGET_P9_VECTOR. gcc/testsuite/ChangeLog: PR target/103627 * gcc.target/powerpc/pr103627-1.c: New test. * gcc.target/powerpc/pr103627-2.c: New test. --- gcc/config/rs6000/rs6000.c | 11 +++++++++++ gcc/testsuite/gcc.target/powerpc/pr103627-1.c | 16 ++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr103627-2.c | 16 ++++++++++++++++ 3 files changed, 43 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103627-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr103627-2.c -- 2.27.0 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index c020947abc8..ec3b46682a7 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -4505,6 +4505,17 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~OPTION_MASK_MMA; } + /* MMA requires SIMD support as ISA 3.1 claims and our implementation + such as "*movoo" uses vector pair access which are only supported + from ISA 3.1. But since we don't have one separated option to + control Power10 vector, check for Power9 vector instead. */ + if (TARGET_MMA && !TARGET_P9_VECTOR) + { + if ((rs6000_isa_flags_explicit & OPTION_MASK_MMA) != 0) + error ("%qs requires %qs", "-mmma", "-mpower9-vector"); + rs6000_isa_flags &= ~OPTION_MASK_MMA; + } + if (!TARGET_PCREL && TARGET_PCREL_OPT) rs6000_isa_flags &= ~OPTION_MASK_PCREL_OPT; diff --git a/gcc/testsuite/gcc.target/powerpc/pr103627-1.c b/gcc/testsuite/gcc.target/powerpc/pr103627-1.c new file mode 100644 index 00000000000..6c6c16188fb --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr103627-1.c @@ -0,0 +1,16 @@ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -mno-power9-vector" } */ + +/* Verify compiler emits error message instead of ICE. */ + +extern float *dest; +extern __vector_quad src; + +int +foo () +{ + __builtin_mma_disassemble_acc (dest, &src); + /* { dg-error "'__builtin_mma_disassemble_acc' requires the '-mmma' option" "" { target *-*-* } .-1 } */ + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pr103627-2.c b/gcc/testsuite/gcc.target/powerpc/pr103627-2.c new file mode 100644 index 00000000000..6604872c0e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr103627-2.c @@ -0,0 +1,16 @@ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -mmma -mno-power9-vector" } */ + +/* Verify the emitted error message. */ + +extern float *dest; +extern __vector_quad src; + +int +foo () +{ + __builtin_mma_disassemble_acc (dest, &src); + /* { dg-error "'-mmma' requires '-mpower9-vector'" "mma" { target *-*-* } 0 } */ + return 0; +} +