[5/6] aarch64: Port NEON rounding intrinsics to the pragma-based framework
Commit Message
From: Dhruv Chawla <dhruvc@nvidia.com>
Port the following intrinsics to the pragma-based framework:
* vrnd
* vrnda
* vrndi
* vrndm
* vrndn
* vrndns
* vrndp
* vrndx
The following are not ported in this patch as they cannot be directly
lowered from an IFN through an existing instruction pattern:
* vrnd_f64
* vrnda_f64
* vrndi_f64
* vrndm_f64
* vrndn_f64
* vrndp_f64
* vrndx_f64
This is because the pattern does not iterate through the mode (V1DF) required
to lower them (it uses the VHSDF iterator).
Bootstrapped and regtested on aarch64-linux-gnu.
Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:
* config/aarch64/aarch64-neon-builtins-base.cc (vrnd, vrndq, vrnda,
vrndaq, vrndi, vrndiq, vrndm, vrndmq, vrndn, vrndns, vrndnq, vrndp,
vrndpq, vrndx, vrndxq): New function bases.
* config/aarch64/aarch64-neon-builtins-base.def (vrnd, vrndq, vrnda,
vrndaq, vrndi, vrndiq, vrndm, vrndmq, vrndn, vrndns, vrndnq, vrndp,
vrndpq, vrndx, vrndxq): New function groups.
* config/aarch64/arm_neon.h (vrnd_f32, vrndq_f32, vrndq_f64, vrnda_f32,
vrndaq_f32, vrndaq_f64, vrndi_f32, vrndiq_f32, vrndiq_f64, vrndm_f32,
vrndmq_f32, vrndmq_f64, vrndns_f32, vrndn_f32, vrndnq_f32, vrndnq_f64,
vrndp_f32, vrndpq_f32, vrndpq_f64, vrndx_f32, vrndxq_f32, vrndxq_f64,
vrnd_f16, vrndq_f16, vrnda_f16, vrndaq_f16, vrndi_f16, vrndiq_f16,
vrndm_f16, vrndmq_f16, vrndn_f16, vrndnq_f16, vrndp_f16, vrndpq_f16,
vrndx_f16, vrndxq_f16): Delete functions.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/neon/vrnd.c: New test.
* gcc.target/aarch64/neon/vrnda.c: Likewise.
* gcc.target/aarch64/neon/vrndi.c: Likewise.
* gcc.target/aarch64/neon/vrndm.c: Likewise.
* gcc.target/aarch64/neon/vrndn.c: Likewise.
* gcc.target/aarch64/neon/vrndp.c: Likewise.
* gcc.target/aarch64/neon/vrndx.c: Likewise.
---
.../aarch64/aarch64-neon-builtins-base.cc | 17 ++
.../aarch64/aarch64-neon-builtins-base.def | 37 +++
gcc/config/aarch64/arm_neon.h | 252 ------------------
gcc/testsuite/gcc.target/aarch64/neon/vrnd.c | 45 ++++
gcc/testsuite/gcc.target/aarch64/neon/vrnda.c | 45 ++++
gcc/testsuite/gcc.target/aarch64/neon/vrndi.c | 45 ++++
gcc/testsuite/gcc.target/aarch64/neon/vrndm.c | 45 ++++
gcc/testsuite/gcc.target/aarch64/neon/vrndn.c | 52 ++++
gcc/testsuite/gcc.target/aarch64/neon/vrndp.c | 45 ++++
gcc/testsuite/gcc.target/aarch64/neon/vrndx.c | 45 ++++
10 files changed, 376 insertions(+), 252 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrnd.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrnda.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndi.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndm.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndn.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndp.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndx.c
Comments
> On 2 Sep 2026, at 10:38, Dhruv Chawla <dhruvc@nvidia.com> wrote:
>
> From: Dhruv Chawla <dhruvc@nvidia.com>
>
> Port the following intrinsics to the pragma-based framework:
> * vrnd
> * vrnda
> * vrndi
> * vrndm
> * vrndn
> * vrndns
> * vrndp
> * vrndx
>
> The following are not ported in this patch as they cannot be directly
> lowered from an IFN through an existing instruction pattern:
> * vrnd_f64
> * vrnda_f64
> * vrndi_f64
> * vrndm_f64
> * vrndn_f64
> * vrndp_f64
> * vrndx_f64
>
> This is because the pattern does not iterate through the mode (V1DF) required
> to lower them (it uses the VHSDF iterator).
>
> Bootstrapped and regtested on aarch64-linux-gnu.
>
Ok.
Thanks,
Kyrill
> Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-neon-builtins-base.cc (vrnd, vrndq, vrnda,
> vrndaq, vrndi, vrndiq, vrndm, vrndmq, vrndn, vrndns, vrndnq, vrndp,
> vrndpq, vrndx, vrndxq): New function bases.
> * config/aarch64/aarch64-neon-builtins-base.def (vrnd, vrndq, vrnda,
> vrndaq, vrndi, vrndiq, vrndm, vrndmq, vrndn, vrndns, vrndnq, vrndp,
> vrndpq, vrndx, vrndxq): New function groups.
> * config/aarch64/arm_neon.h (vrnd_f32, vrndq_f32, vrndq_f64, vrnda_f32,
> vrndaq_f32, vrndaq_f64, vrndi_f32, vrndiq_f32, vrndiq_f64, vrndm_f32,
> vrndmq_f32, vrndmq_f64, vrndns_f32, vrndn_f32, vrndnq_f32, vrndnq_f64,
> vrndp_f32, vrndpq_f32, vrndpq_f64, vrndx_f32, vrndxq_f32, vrndxq_f64,
> vrnd_f16, vrndq_f16, vrnda_f16, vrndaq_f16, vrndi_f16, vrndiq_f16,
> vrndm_f16, vrndmq_f16, vrndn_f16, vrndnq_f16, vrndp_f16, vrndpq_f16,
> vrndx_f16, vrndxq_f16): Delete functions.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/aarch64/neon/vrnd.c: New test.
> * gcc.target/aarch64/neon/vrnda.c: Likewise.
> * gcc.target/aarch64/neon/vrndi.c: Likewise.
> * gcc.target/aarch64/neon/vrndm.c: Likewise.
> * gcc.target/aarch64/neon/vrndn.c: Likewise.
> * gcc.target/aarch64/neon/vrndp.c: Likewise.
> * gcc.target/aarch64/neon/vrndx.c: Likewise.
> ---
> .../aarch64/aarch64-neon-builtins-base.cc | 17 ++
> .../aarch64/aarch64-neon-builtins-base.def | 37 +++
> gcc/config/aarch64/arm_neon.h | 252 ------------------
> gcc/testsuite/gcc.target/aarch64/neon/vrnd.c | 45 ++++
> gcc/testsuite/gcc.target/aarch64/neon/vrnda.c | 45 ++++
> gcc/testsuite/gcc.target/aarch64/neon/vrndi.c | 45 ++++
> gcc/testsuite/gcc.target/aarch64/neon/vrndm.c | 45 ++++
> gcc/testsuite/gcc.target/aarch64/neon/vrndn.c | 52 ++++
> gcc/testsuite/gcc.target/aarch64/neon/vrndp.c | 45 ++++
> gcc/testsuite/gcc.target/aarch64/neon/vrndx.c | 45 ++++
> 10 files changed, 376 insertions(+), 252 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrnd.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrnda.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndi.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndm.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndn.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndp.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrndx.c
>
> diff --git a/gcc/config/aarch64/aarch64-neon-builtins-base.cc b/gcc/config/aarch64/aarch64-neon-builtins-base.cc
> index ca4ace4a020..b8bb324f7de 100644
> --- a/gcc/config/aarch64/aarch64-neon-builtins-base.cc
> +++ b/gcc/config/aarch64/aarch64-neon-builtins-base.cc
> @@ -789,6 +789,23 @@ NEON_FUNCTION (vrhaddq, gimple_ifn, (IFN_AVG_CEIL))
> NEON_FUNCTION (vsqrt, gimple_ifn, (IFN_SQRT))
> NEON_FUNCTION (vsqrtq, gimple_ifn, (IFN_SQRT))
>
> +// Rounding
> +NEON_FUNCTION (vrnd, gimple_ifn, (IFN_TRUNC))
> +NEON_FUNCTION (vrndq, gimple_ifn, (IFN_TRUNC))
> +NEON_FUNCTION (vrnda, gimple_ifn, (IFN_ROUND))
> +NEON_FUNCTION (vrndaq, gimple_ifn, (IFN_ROUND))
> +NEON_FUNCTION (vrndi, gimple_ifn, (IFN_NEARBYINT))
> +NEON_FUNCTION (vrndiq, gimple_ifn, (IFN_NEARBYINT))
> +NEON_FUNCTION (vrndm, gimple_ifn, (IFN_FLOOR))
> +NEON_FUNCTION (vrndmq, gimple_ifn, (IFN_FLOOR))
> +NEON_FUNCTION (vrndn, gimple_ifn, (IFN_ROUNDEVEN))
> +NEON_FUNCTION (vrndnq, gimple_ifn, (IFN_ROUNDEVEN))
> +NEON_FUNCTION (vrndp, gimple_ifn, (IFN_CEIL))
> +NEON_FUNCTION (vrndpq, gimple_ifn, (IFN_CEIL))
> +NEON_FUNCTION (vrndx, gimple_ifn, (IFN_RINT))
> +NEON_FUNCTION (vrndxq, gimple_ifn, (IFN_RINT))
> +NEON_FUNCTION (vrndns, gimple_ifn, (IFN_ROUNDEVEN))
> +
> // Bitwise operations
> NEON_FUNCTION (vand, gimple_expr, (BIT_AND_EXPR))
> NEON_FUNCTION (vandq, gimple_expr, (BIT_AND_EXPR))
> diff --git a/gcc/config/aarch64/aarch64-neon-builtins-base.def b/gcc/config/aarch64/aarch64-neon-builtins-base.def
> index 98efa204e4a..70f14c46f0a 100644
> --- a/gcc/config/aarch64/aarch64-neon-builtins-base.def
> +++ b/gcc/config/aarch64/aarch64-neon-builtins-base.def
> @@ -134,6 +134,43 @@ DEF_NEON_FUNCTION (vsqrt, h_float, ("D0,D0"))
> DEF_NEON_FUNCTION (vsqrtq, h_float, ("Q0,Q0"))
> #undef REQUIRED_EXTENSIONS
>
> +// Rounding
> +#define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
> +DEF_NEON_FUNCTION (vrnd, s_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndq, sd_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrnda, s_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndaq, sd_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndi, s_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndiq, sd_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndm, s_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndmq, sd_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndn, s_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndns, s_float, ("s0,s0"))
> +DEF_NEON_FUNCTION (vrndnq, sd_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndp, s_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndpq, sd_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndx, s_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndxq, sd_float, ("Q0,Q0"))
> +#undef REQUIRED_EXTENSIONS
> +
> +// Rounding (FP16)
> +#define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD | AARCH64_FL_F16)
> +DEF_NEON_FUNCTION (vrnd, h_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndq, h_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrnda, h_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndaq, h_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndi, h_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndiq, h_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndm, h_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndmq, h_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndn, h_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndnq, h_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndp, h_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndpq, h_float, ("Q0,Q0"))
> +DEF_NEON_FUNCTION (vrndx, h_float, ("D0,D0"))
> +DEF_NEON_FUNCTION (vrndxq, h_float, ("Q0,Q0"))
> +#undef REQUIRED_EXTENSIONS
> +
> // Bitwise operations
> #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
> DEF_NEON_FUNCTION (vand, all_integer, ("D0,D0,D0"))
> diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
> index 68f92f76de0..59eba4c70ed 100644
> --- a/gcc/config/aarch64/arm_neon.h
> +++ b/gcc/config/aarch64/arm_neon.h
> @@ -15248,13 +15248,6 @@ vrecpxd_f64 (float64_t __a)
>
> /* vrnd */
>
> -__extension__ extern __inline float32x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrnd_f32 (float32x2_t __a)
> -{
> - return __builtin_aarch64_btruncv2sf (__a);
> -}
> -
> __extension__ extern __inline float64x1_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vrnd_f64 (float64x1_t __a)
> @@ -15262,29 +15255,8 @@ vrnd_f64 (float64x1_t __a)
> return vset_lane_f64 (__builtin_trunc (vget_lane_f64 (__a, 0)), __a, 0);
> }
>
> -__extension__ extern __inline float32x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndq_f32 (float32x4_t __a)
> -{
> - return __builtin_aarch64_btruncv4sf (__a);
> -}
> -
> -__extension__ extern __inline float64x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndq_f64 (float64x2_t __a)
> -{
> - return __builtin_aarch64_btruncv2df (__a);
> -}
> -
> /* vrnda */
>
> -__extension__ extern __inline float32x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrnda_f32 (float32x2_t __a)
> -{
> - return __builtin_aarch64_roundv2sf (__a);
> -}
> -
> __extension__ extern __inline float64x1_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vrnda_f64 (float64x1_t __a)
> @@ -15292,29 +15264,8 @@ vrnda_f64 (float64x1_t __a)
> return vset_lane_f64 (__builtin_round (vget_lane_f64 (__a, 0)), __a, 0);
> }
>
> -__extension__ extern __inline float32x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndaq_f32 (float32x4_t __a)
> -{
> - return __builtin_aarch64_roundv4sf (__a);
> -}
> -
> -__extension__ extern __inline float64x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndaq_f64 (float64x2_t __a)
> -{
> - return __builtin_aarch64_roundv2df (__a);
> -}
> -
> /* vrndi */
>
> -__extension__ extern __inline float32x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndi_f32 (float32x2_t __a)
> -{
> - return __builtin_aarch64_nearbyintv2sf (__a);
> -}
> -
> __extension__ extern __inline float64x1_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vrndi_f64 (float64x1_t __a)
> @@ -15322,29 +15273,8 @@ vrndi_f64 (float64x1_t __a)
> return vset_lane_f64 (__builtin_nearbyint (vget_lane_f64 (__a, 0)), __a, 0);
> }
>
> -__extension__ extern __inline float32x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndiq_f32 (float32x4_t __a)
> -{
> - return __builtin_aarch64_nearbyintv4sf (__a);
> -}
> -
> -__extension__ extern __inline float64x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndiq_f64 (float64x2_t __a)
> -{
> - return __builtin_aarch64_nearbyintv2df (__a);
> -}
> -
> /* vrndm */
>
> -__extension__ extern __inline float32x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndm_f32 (float32x2_t __a)
> -{
> - return __builtin_aarch64_floorv2sf (__a);
> -}
> -
> __extension__ extern __inline float64x1_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vrndm_f64 (float64x1_t __a)
> @@ -15352,36 +15282,8 @@ vrndm_f64 (float64x1_t __a)
> return vset_lane_f64 (__builtin_floor (vget_lane_f64 (__a, 0)), __a, 0);
> }
>
> -__extension__ extern __inline float32x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndmq_f32 (float32x4_t __a)
> -{
> - return __builtin_aarch64_floorv4sf (__a);
> -}
> -
> -__extension__ extern __inline float64x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndmq_f64 (float64x2_t __a)
> -{
> - return __builtin_aarch64_floorv2df (__a);
> -}
> -
> /* vrndn */
>
> -__extension__ extern __inline float32_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndns_f32 (float32_t __a)
> -{
> - return __builtin_aarch64_roundevensf (__a);
> -}
> -
> -__extension__ extern __inline float32x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndn_f32 (float32x2_t __a)
> -{
> - return __builtin_aarch64_roundevenv2sf (__a);
> -}
> -
> __extension__ extern __inline float64x1_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vrndn_f64 (float64x1_t __a)
> @@ -15389,29 +15291,8 @@ vrndn_f64 (float64x1_t __a)
> return (float64x1_t) {__builtin_aarch64_roundevendf (__a[0])};
> }
>
> -__extension__ extern __inline float32x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndnq_f32 (float32x4_t __a)
> -{
> - return __builtin_aarch64_roundevenv4sf (__a);
> -}
> -
> -__extension__ extern __inline float64x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndnq_f64 (float64x2_t __a)
> -{
> - return __builtin_aarch64_roundevenv2df (__a);
> -}
> -
> /* vrndp */
>
> -__extension__ extern __inline float32x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndp_f32 (float32x2_t __a)
> -{
> - return __builtin_aarch64_ceilv2sf (__a);
> -}
> -
> __extension__ extern __inline float64x1_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vrndp_f64 (float64x1_t __a)
> @@ -15419,29 +15300,8 @@ vrndp_f64 (float64x1_t __a)
> return vset_lane_f64 (__builtin_ceil (vget_lane_f64 (__a, 0)), __a, 0);
> }
>
> -__extension__ extern __inline float32x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndpq_f32 (float32x4_t __a)
> -{
> - return __builtin_aarch64_ceilv4sf (__a);
> -}
> -
> -__extension__ extern __inline float64x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndpq_f64 (float64x2_t __a)
> -{
> - return __builtin_aarch64_ceilv2df (__a);
> -}
> -
> /* vrndx */
>
> -__extension__ extern __inline float32x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndx_f32 (float32x2_t __a)
> -{
> - return __builtin_aarch64_rintv2sf (__a);
> -}
> -
> __extension__ extern __inline float64x1_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vrndx_f64 (float64x1_t __a)
> @@ -15449,20 +15309,6 @@ vrndx_f64 (float64x1_t __a)
> return vset_lane_f64 (__builtin_rint (vget_lane_f64 (__a, 0)), __a, 0);
> }
>
> -__extension__ extern __inline float32x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndxq_f32 (float32x4_t __a)
> -{
> - return __builtin_aarch64_rintv4sf (__a);
> -}
> -
> -__extension__ extern __inline float64x2_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndxq_f64 (float64x2_t __a)
> -{
> - return __builtin_aarch64_rintv2df (__a);
> -}
> -
> /* vrshl */
>
> __extension__ extern __inline int8x8_t
> @@ -19186,104 +19032,6 @@ vrecpeq_f16 (float16x8_t __a)
> return __builtin_aarch64_frecpev8hf (__a);
> }
>
> -__extension__ extern __inline float16x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrnd_f16 (float16x4_t __a)
> -{
> - return __builtin_aarch64_btruncv4hf (__a);
> -}
> -
> -__extension__ extern __inline float16x8_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndq_f16 (float16x8_t __a)
> -{
> - return __builtin_aarch64_btruncv8hf (__a);
> -}
> -
> -__extension__ extern __inline float16x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrnda_f16 (float16x4_t __a)
> -{
> - return __builtin_aarch64_roundv4hf (__a);
> -}
> -
> -__extension__ extern __inline float16x8_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndaq_f16 (float16x8_t __a)
> -{
> - return __builtin_aarch64_roundv8hf (__a);
> -}
> -
> -__extension__ extern __inline float16x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndi_f16 (float16x4_t __a)
> -{
> - return __builtin_aarch64_nearbyintv4hf (__a);
> -}
> -
> -__extension__ extern __inline float16x8_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndiq_f16 (float16x8_t __a)
> -{
> - return __builtin_aarch64_nearbyintv8hf (__a);
> -}
> -
> -__extension__ extern __inline float16x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndm_f16 (float16x4_t __a)
> -{
> - return __builtin_aarch64_floorv4hf (__a);
> -}
> -
> -__extension__ extern __inline float16x8_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndmq_f16 (float16x8_t __a)
> -{
> - return __builtin_aarch64_floorv8hf (__a);
> -}
> -
> -__extension__ extern __inline float16x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndn_f16 (float16x4_t __a)
> -{
> - return __builtin_aarch64_roundevenv4hf (__a);
> -}
> -
> -__extension__ extern __inline float16x8_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndnq_f16 (float16x8_t __a)
> -{
> - return __builtin_aarch64_roundevenv8hf (__a);
> -}
> -
> -__extension__ extern __inline float16x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndp_f16 (float16x4_t __a)
> -{
> - return __builtin_aarch64_ceilv4hf (__a);
> -}
> -
> -__extension__ extern __inline float16x8_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndpq_f16 (float16x8_t __a)
> -{
> - return __builtin_aarch64_ceilv8hf (__a);
> -}
> -
> -__extension__ extern __inline float16x4_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndx_f16 (float16x4_t __a)
> -{
> - return __builtin_aarch64_rintv4hf (__a);
> -}
> -
> -__extension__ extern __inline float16x8_t
> -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> -vrndxq_f16 (float16x8_t __a)
> -{
> - return __builtin_aarch64_rintv8hf (__a);
> -}
> -
> __extension__ extern __inline float16x4_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vrsqrte_f16 (float16x4_t __a)
> diff --git a/gcc/testsuite/gcc.target/aarch64/neon/vrnd.c b/gcc/testsuite/gcc.target/aarch64/neon/vrnd.c
> new file mode 100644
> index 00000000000..6c4ce68b947
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/neon/vrnd.c
> @@ -0,0 +1,45 @@
> +/* { dg-do compile } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> +
> +#include "arm_neon_test.h"
> +
> +/*
> +** test_vrnd_f16:
> +** frintz v0\.4h, v0\.4h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrnd_f16, float16x4_t)
> +
> +/*
> +** test_vrnd_f32:
> +** frintz v0\.2s, v0\.2s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrnd_f32, float32x2_t)
> +
> +/*
> +** test_vrnd_f64:
> +** frintz d0, d0
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrnd_f64, float64x1_t)
> +
> +/*
> +** test_vrndq_f16:
> +** frintz v0\.8h, v0\.8h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndq_f16, float16x8_t)
> +
> +/*
> +** test_vrndq_f32:
> +** frintz v0\.4s, v0\.4s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndq_f32, float32x4_t)
> +/*
> +** test_vrndq_f64:
> +** frintz v0\.2d, v0\.2d
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndq_f64, float64x2_t)
> diff --git a/gcc/testsuite/gcc.target/aarch64/neon/vrnda.c b/gcc/testsuite/gcc.target/aarch64/neon/vrnda.c
> new file mode 100644
> index 00000000000..f62cd744f1b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/neon/vrnda.c
> @@ -0,0 +1,45 @@
> +/* { dg-do compile } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> +
> +#include "arm_neon_test.h"
> +
> +/*
> +** test_vrnda_f16:
> +** frinta v0\.4h, v0\.4h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrnda_f16, float16x4_t)
> +
> +/*
> +** test_vrnda_f32:
> +** frinta v0\.2s, v0\.2s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrnda_f32, float32x2_t)
> +
> +/*
> +** test_vrnda_f64:
> +** frinta d0, d0
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrnda_f64, float64x1_t)
> +
> +/*
> +** test_vrndaq_f16:
> +** frinta v0\.8h, v0\.8h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndaq_f16, float16x8_t)
> +
> +/*
> +** test_vrndaq_f32:
> +** frinta v0\.4s, v0\.4s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndaq_f32, float32x4_t)
> +/*
> +** test_vrndaq_f64:
> +** frinta v0\.2d, v0\.2d
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndaq_f64, float64x2_t)
> diff --git a/gcc/testsuite/gcc.target/aarch64/neon/vrndi.c b/gcc/testsuite/gcc.target/aarch64/neon/vrndi.c
> new file mode 100644
> index 00000000000..3e25f068c60
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/neon/vrndi.c
> @@ -0,0 +1,45 @@
> +/* { dg-do compile } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> +
> +#include "arm_neon_test.h"
> +
> +/*
> +** test_vrndi_f16:
> +** frinti v0\.4h, v0\.4h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndi_f16, float16x4_t)
> +
> +/*
> +** test_vrndi_f32:
> +** frinti v0\.2s, v0\.2s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndi_f32, float32x2_t)
> +
> +/*
> +** test_vrndi_f64:
> +** frinti d0, d0
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndi_f64, float64x1_t)
> +
> +/*
> +** test_vrndiq_f16:
> +** frinti v0\.8h, v0\.8h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndiq_f16, float16x8_t)
> +
> +/*
> +** test_vrndiq_f32:
> +** frinti v0\.4s, v0\.4s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndiq_f32, float32x4_t)
> +/*
> +** test_vrndiq_f64:
> +** frinti v0\.2d, v0\.2d
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndiq_f64, float64x2_t)
> diff --git a/gcc/testsuite/gcc.target/aarch64/neon/vrndm.c b/gcc/testsuite/gcc.target/aarch64/neon/vrndm.c
> new file mode 100644
> index 00000000000..9b3a27f640d
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/neon/vrndm.c
> @@ -0,0 +1,45 @@
> +/* { dg-do compile } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> +
> +#include "arm_neon_test.h"
> +
> +/*
> +** test_vrndm_f16:
> +** frintm v0\.4h, v0\.4h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndm_f16, float16x4_t)
> +
> +/*
> +** test_vrndm_f32:
> +** frintm v0\.2s, v0\.2s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndm_f32, float32x2_t)
> +
> +/*
> +** test_vrndm_f64:
> +** frintm d0, d0
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndm_f64, float64x1_t)
> +
> +/*
> +** test_vrndmq_f16:
> +** frintm v0\.8h, v0\.8h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndmq_f16, float16x8_t)
> +
> +/*
> +** test_vrndmq_f32:
> +** frintm v0\.4s, v0\.4s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndmq_f32, float32x4_t)
> +/*
> +** test_vrndmq_f64:
> +** frintm v0\.2d, v0\.2d
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndmq_f64, float64x2_t)
> diff --git a/gcc/testsuite/gcc.target/aarch64/neon/vrndn.c b/gcc/testsuite/gcc.target/aarch64/neon/vrndn.c
> new file mode 100644
> index 00000000000..48606cec14f
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/neon/vrndn.c
> @@ -0,0 +1,52 @@
> +/* { dg-do compile } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> +
> +#include "arm_neon_test.h"
> +
> +/*
> +** test_vrndn_f16:
> +** frintn v0\.4h, v0\.4h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndn_f16, float16x4_t)
> +
> +/*
> +** test_vrndn_f32:
> +** frintn v0\.2s, v0\.2s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndn_f32, float32x2_t)
> +
> +/*
> +** test_vrndn_f64:
> +** frintn d0, d0
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndn_f64, float64x1_t)
> +
> +/*
> +** test_vrndnq_f16:
> +** frintn v0\.8h, v0\.8h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndnq_f16, float16x8_t)
> +
> +/*
> +** test_vrndnq_f32:
> +** frintn v0\.4s, v0\.4s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndnq_f32, float32x4_t)
> +/*
> +** test_vrndnq_f64:
> +** frintn v0\.2d, v0\.2d
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndnq_f64, float64x2_t)
> +
> +/*
> +** test_vrndns_f32:
> +** frintn s0, s0
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndns_f32, float32_t)
> diff --git a/gcc/testsuite/gcc.target/aarch64/neon/vrndp.c b/gcc/testsuite/gcc.target/aarch64/neon/vrndp.c
> new file mode 100644
> index 00000000000..1d2b75bb8d4
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/neon/vrndp.c
> @@ -0,0 +1,45 @@
> +/* { dg-do compile } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> +
> +#include "arm_neon_test.h"
> +
> +/*
> +** test_vrndp_f16:
> +** frintp v0\.4h, v0\.4h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndp_f16, float16x4_t)
> +
> +/*
> +** test_vrndp_f32:
> +** frintp v0\.2s, v0\.2s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndp_f32, float32x2_t)
> +
> +/*
> +** test_vrndp_f64:
> +** frintp d0, d0
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndp_f64, float64x1_t)
> +
> +/*
> +** test_vrndpq_f16:
> +** frintp v0\.8h, v0\.8h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndpq_f16, float16x8_t)
> +
> +/*
> +** test_vrndpq_f32:
> +** frintp v0\.4s, v0\.4s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndpq_f32, float32x4_t)
> +/*
> +** test_vrndpq_f64:
> +** frintp v0\.2d, v0\.2d
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndpq_f64, float64x2_t)
> diff --git a/gcc/testsuite/gcc.target/aarch64/neon/vrndx.c b/gcc/testsuite/gcc.target/aarch64/neon/vrndx.c
> new file mode 100644
> index 00000000000..5f3d92e0a54
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/neon/vrndx.c
> @@ -0,0 +1,45 @@
> +/* { dg-do compile } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> +
> +#include "arm_neon_test.h"
> +
> +/*
> +** test_vrndx_f16:
> +** frintx v0\.4h, v0\.4h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndx_f16, float16x4_t)
> +
> +/*
> +** test_vrndx_f32:
> +** frintx v0\.2s, v0\.2s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndx_f32, float32x2_t)
> +
> +/*
> +** test_vrndx_f64:
> +** frintx d0, d0
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndx_f64, float64x1_t)
> +
> +/*
> +** test_vrndxq_f16:
> +** frintx v0\.8h, v0\.8h
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndxq_f16, float16x8_t)
> +
> +/*
> +** test_vrndxq_f32:
> +** frintx v0\.4s, v0\.4s
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndxq_f32, float32x4_t)
> +/*
> +** test_vrndxq_f64:
> +** frintx v0\.2d, v0\.2d
> +** ret
> +*/
> +TEST_UNIFORM_UNARY (vrndxq_f64, float64x2_t)
> --
> 2.43.0
>
@@ -789,6 +789,23 @@ NEON_FUNCTION (vrhaddq, gimple_ifn, (IFN_AVG_CEIL))
NEON_FUNCTION (vsqrt, gimple_ifn, (IFN_SQRT))
NEON_FUNCTION (vsqrtq, gimple_ifn, (IFN_SQRT))
+// Rounding
+NEON_FUNCTION (vrnd, gimple_ifn, (IFN_TRUNC))
+NEON_FUNCTION (vrndq, gimple_ifn, (IFN_TRUNC))
+NEON_FUNCTION (vrnda, gimple_ifn, (IFN_ROUND))
+NEON_FUNCTION (vrndaq, gimple_ifn, (IFN_ROUND))
+NEON_FUNCTION (vrndi, gimple_ifn, (IFN_NEARBYINT))
+NEON_FUNCTION (vrndiq, gimple_ifn, (IFN_NEARBYINT))
+NEON_FUNCTION (vrndm, gimple_ifn, (IFN_FLOOR))
+NEON_FUNCTION (vrndmq, gimple_ifn, (IFN_FLOOR))
+NEON_FUNCTION (vrndn, gimple_ifn, (IFN_ROUNDEVEN))
+NEON_FUNCTION (vrndnq, gimple_ifn, (IFN_ROUNDEVEN))
+NEON_FUNCTION (vrndp, gimple_ifn, (IFN_CEIL))
+NEON_FUNCTION (vrndpq, gimple_ifn, (IFN_CEIL))
+NEON_FUNCTION (vrndx, gimple_ifn, (IFN_RINT))
+NEON_FUNCTION (vrndxq, gimple_ifn, (IFN_RINT))
+NEON_FUNCTION (vrndns, gimple_ifn, (IFN_ROUNDEVEN))
+
// Bitwise operations
NEON_FUNCTION (vand, gimple_expr, (BIT_AND_EXPR))
NEON_FUNCTION (vandq, gimple_expr, (BIT_AND_EXPR))
@@ -134,6 +134,43 @@ DEF_NEON_FUNCTION (vsqrt, h_float, ("D0,D0"))
DEF_NEON_FUNCTION (vsqrtq, h_float, ("Q0,Q0"))
#undef REQUIRED_EXTENSIONS
+// Rounding
+#define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
+DEF_NEON_FUNCTION (vrnd, s_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndq, sd_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrnda, s_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndaq, sd_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndi, s_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndiq, sd_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndm, s_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndmq, sd_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndn, s_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndns, s_float, ("s0,s0"))
+DEF_NEON_FUNCTION (vrndnq, sd_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndp, s_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndpq, sd_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndx, s_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndxq, sd_float, ("Q0,Q0"))
+#undef REQUIRED_EXTENSIONS
+
+// Rounding (FP16)
+#define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD | AARCH64_FL_F16)
+DEF_NEON_FUNCTION (vrnd, h_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndq, h_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrnda, h_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndaq, h_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndi, h_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndiq, h_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndm, h_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndmq, h_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndn, h_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndnq, h_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndp, h_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndpq, h_float, ("Q0,Q0"))
+DEF_NEON_FUNCTION (vrndx, h_float, ("D0,D0"))
+DEF_NEON_FUNCTION (vrndxq, h_float, ("Q0,Q0"))
+#undef REQUIRED_EXTENSIONS
+
// Bitwise operations
#define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
DEF_NEON_FUNCTION (vand, all_integer, ("D0,D0,D0"))
@@ -15248,13 +15248,6 @@ vrecpxd_f64 (float64_t __a)
/* vrnd */
-__extension__ extern __inline float32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrnd_f32 (float32x2_t __a)
-{
- return __builtin_aarch64_btruncv2sf (__a);
-}
-
__extension__ extern __inline float64x1_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrnd_f64 (float64x1_t __a)
@@ -15262,29 +15255,8 @@ vrnd_f64 (float64x1_t __a)
return vset_lane_f64 (__builtin_trunc (vget_lane_f64 (__a, 0)), __a, 0);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndq_f32 (float32x4_t __a)
-{
- return __builtin_aarch64_btruncv4sf (__a);
-}
-
-__extension__ extern __inline float64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndq_f64 (float64x2_t __a)
-{
- return __builtin_aarch64_btruncv2df (__a);
-}
-
/* vrnda */
-__extension__ extern __inline float32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrnda_f32 (float32x2_t __a)
-{
- return __builtin_aarch64_roundv2sf (__a);
-}
-
__extension__ extern __inline float64x1_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrnda_f64 (float64x1_t __a)
@@ -15292,29 +15264,8 @@ vrnda_f64 (float64x1_t __a)
return vset_lane_f64 (__builtin_round (vget_lane_f64 (__a, 0)), __a, 0);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndaq_f32 (float32x4_t __a)
-{
- return __builtin_aarch64_roundv4sf (__a);
-}
-
-__extension__ extern __inline float64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndaq_f64 (float64x2_t __a)
-{
- return __builtin_aarch64_roundv2df (__a);
-}
-
/* vrndi */
-__extension__ extern __inline float32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndi_f32 (float32x2_t __a)
-{
- return __builtin_aarch64_nearbyintv2sf (__a);
-}
-
__extension__ extern __inline float64x1_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndi_f64 (float64x1_t __a)
@@ -15322,29 +15273,8 @@ vrndi_f64 (float64x1_t __a)
return vset_lane_f64 (__builtin_nearbyint (vget_lane_f64 (__a, 0)), __a, 0);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndiq_f32 (float32x4_t __a)
-{
- return __builtin_aarch64_nearbyintv4sf (__a);
-}
-
-__extension__ extern __inline float64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndiq_f64 (float64x2_t __a)
-{
- return __builtin_aarch64_nearbyintv2df (__a);
-}
-
/* vrndm */
-__extension__ extern __inline float32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndm_f32 (float32x2_t __a)
-{
- return __builtin_aarch64_floorv2sf (__a);
-}
-
__extension__ extern __inline float64x1_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndm_f64 (float64x1_t __a)
@@ -15352,36 +15282,8 @@ vrndm_f64 (float64x1_t __a)
return vset_lane_f64 (__builtin_floor (vget_lane_f64 (__a, 0)), __a, 0);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndmq_f32 (float32x4_t __a)
-{
- return __builtin_aarch64_floorv4sf (__a);
-}
-
-__extension__ extern __inline float64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndmq_f64 (float64x2_t __a)
-{
- return __builtin_aarch64_floorv2df (__a);
-}
-
/* vrndn */
-__extension__ extern __inline float32_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndns_f32 (float32_t __a)
-{
- return __builtin_aarch64_roundevensf (__a);
-}
-
-__extension__ extern __inline float32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndn_f32 (float32x2_t __a)
-{
- return __builtin_aarch64_roundevenv2sf (__a);
-}
-
__extension__ extern __inline float64x1_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndn_f64 (float64x1_t __a)
@@ -15389,29 +15291,8 @@ vrndn_f64 (float64x1_t __a)
return (float64x1_t) {__builtin_aarch64_roundevendf (__a[0])};
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndnq_f32 (float32x4_t __a)
-{
- return __builtin_aarch64_roundevenv4sf (__a);
-}
-
-__extension__ extern __inline float64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndnq_f64 (float64x2_t __a)
-{
- return __builtin_aarch64_roundevenv2df (__a);
-}
-
/* vrndp */
-__extension__ extern __inline float32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndp_f32 (float32x2_t __a)
-{
- return __builtin_aarch64_ceilv2sf (__a);
-}
-
__extension__ extern __inline float64x1_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndp_f64 (float64x1_t __a)
@@ -15419,29 +15300,8 @@ vrndp_f64 (float64x1_t __a)
return vset_lane_f64 (__builtin_ceil (vget_lane_f64 (__a, 0)), __a, 0);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndpq_f32 (float32x4_t __a)
-{
- return __builtin_aarch64_ceilv4sf (__a);
-}
-
-__extension__ extern __inline float64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndpq_f64 (float64x2_t __a)
-{
- return __builtin_aarch64_ceilv2df (__a);
-}
-
/* vrndx */
-__extension__ extern __inline float32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndx_f32 (float32x2_t __a)
-{
- return __builtin_aarch64_rintv2sf (__a);
-}
-
__extension__ extern __inline float64x1_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrndx_f64 (float64x1_t __a)
@@ -15449,20 +15309,6 @@ vrndx_f64 (float64x1_t __a)
return vset_lane_f64 (__builtin_rint (vget_lane_f64 (__a, 0)), __a, 0);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndxq_f32 (float32x4_t __a)
-{
- return __builtin_aarch64_rintv4sf (__a);
-}
-
-__extension__ extern __inline float64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndxq_f64 (float64x2_t __a)
-{
- return __builtin_aarch64_rintv2df (__a);
-}
-
/* vrshl */
__extension__ extern __inline int8x8_t
@@ -19186,104 +19032,6 @@ vrecpeq_f16 (float16x8_t __a)
return __builtin_aarch64_frecpev8hf (__a);
}
-__extension__ extern __inline float16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrnd_f16 (float16x4_t __a)
-{
- return __builtin_aarch64_btruncv4hf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndq_f16 (float16x8_t __a)
-{
- return __builtin_aarch64_btruncv8hf (__a);
-}
-
-__extension__ extern __inline float16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrnda_f16 (float16x4_t __a)
-{
- return __builtin_aarch64_roundv4hf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndaq_f16 (float16x8_t __a)
-{
- return __builtin_aarch64_roundv8hf (__a);
-}
-
-__extension__ extern __inline float16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndi_f16 (float16x4_t __a)
-{
- return __builtin_aarch64_nearbyintv4hf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndiq_f16 (float16x8_t __a)
-{
- return __builtin_aarch64_nearbyintv8hf (__a);
-}
-
-__extension__ extern __inline float16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndm_f16 (float16x4_t __a)
-{
- return __builtin_aarch64_floorv4hf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndmq_f16 (float16x8_t __a)
-{
- return __builtin_aarch64_floorv8hf (__a);
-}
-
-__extension__ extern __inline float16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndn_f16 (float16x4_t __a)
-{
- return __builtin_aarch64_roundevenv4hf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndnq_f16 (float16x8_t __a)
-{
- return __builtin_aarch64_roundevenv8hf (__a);
-}
-
-__extension__ extern __inline float16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndp_f16 (float16x4_t __a)
-{
- return __builtin_aarch64_ceilv4hf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndpq_f16 (float16x8_t __a)
-{
- return __builtin_aarch64_ceilv8hf (__a);
-}
-
-__extension__ extern __inline float16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndx_f16 (float16x4_t __a)
-{
- return __builtin_aarch64_rintv4hf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vrndxq_f16 (float16x8_t __a)
-{
- return __builtin_aarch64_rintv8hf (__a);
-}
-
__extension__ extern __inline float16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vrsqrte_f16 (float16x4_t __a)
new file mode 100644
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_neon_test.h"
+
+/*
+** test_vrnd_f16:
+** frintz v0\.4h, v0\.4h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrnd_f16, float16x4_t)
+
+/*
+** test_vrnd_f32:
+** frintz v0\.2s, v0\.2s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrnd_f32, float32x2_t)
+
+/*
+** test_vrnd_f64:
+** frintz d0, d0
+** ret
+*/
+TEST_UNIFORM_UNARY (vrnd_f64, float64x1_t)
+
+/*
+** test_vrndq_f16:
+** frintz v0\.8h, v0\.8h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndq_f16, float16x8_t)
+
+/*
+** test_vrndq_f32:
+** frintz v0\.4s, v0\.4s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndq_f32, float32x4_t)
+/*
+** test_vrndq_f64:
+** frintz v0\.2d, v0\.2d
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndq_f64, float64x2_t)
new file mode 100644
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_neon_test.h"
+
+/*
+** test_vrnda_f16:
+** frinta v0\.4h, v0\.4h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrnda_f16, float16x4_t)
+
+/*
+** test_vrnda_f32:
+** frinta v0\.2s, v0\.2s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrnda_f32, float32x2_t)
+
+/*
+** test_vrnda_f64:
+** frinta d0, d0
+** ret
+*/
+TEST_UNIFORM_UNARY (vrnda_f64, float64x1_t)
+
+/*
+** test_vrndaq_f16:
+** frinta v0\.8h, v0\.8h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndaq_f16, float16x8_t)
+
+/*
+** test_vrndaq_f32:
+** frinta v0\.4s, v0\.4s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndaq_f32, float32x4_t)
+/*
+** test_vrndaq_f64:
+** frinta v0\.2d, v0\.2d
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndaq_f64, float64x2_t)
new file mode 100644
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_neon_test.h"
+
+/*
+** test_vrndi_f16:
+** frinti v0\.4h, v0\.4h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndi_f16, float16x4_t)
+
+/*
+** test_vrndi_f32:
+** frinti v0\.2s, v0\.2s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndi_f32, float32x2_t)
+
+/*
+** test_vrndi_f64:
+** frinti d0, d0
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndi_f64, float64x1_t)
+
+/*
+** test_vrndiq_f16:
+** frinti v0\.8h, v0\.8h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndiq_f16, float16x8_t)
+
+/*
+** test_vrndiq_f32:
+** frinti v0\.4s, v0\.4s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndiq_f32, float32x4_t)
+/*
+** test_vrndiq_f64:
+** frinti v0\.2d, v0\.2d
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndiq_f64, float64x2_t)
new file mode 100644
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_neon_test.h"
+
+/*
+** test_vrndm_f16:
+** frintm v0\.4h, v0\.4h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndm_f16, float16x4_t)
+
+/*
+** test_vrndm_f32:
+** frintm v0\.2s, v0\.2s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndm_f32, float32x2_t)
+
+/*
+** test_vrndm_f64:
+** frintm d0, d0
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndm_f64, float64x1_t)
+
+/*
+** test_vrndmq_f16:
+** frintm v0\.8h, v0\.8h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndmq_f16, float16x8_t)
+
+/*
+** test_vrndmq_f32:
+** frintm v0\.4s, v0\.4s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndmq_f32, float32x4_t)
+/*
+** test_vrndmq_f64:
+** frintm v0\.2d, v0\.2d
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndmq_f64, float64x2_t)
new file mode 100644
@@ -0,0 +1,52 @@
+/* { dg-do compile } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_neon_test.h"
+
+/*
+** test_vrndn_f16:
+** frintn v0\.4h, v0\.4h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndn_f16, float16x4_t)
+
+/*
+** test_vrndn_f32:
+** frintn v0\.2s, v0\.2s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndn_f32, float32x2_t)
+
+/*
+** test_vrndn_f64:
+** frintn d0, d0
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndn_f64, float64x1_t)
+
+/*
+** test_vrndnq_f16:
+** frintn v0\.8h, v0\.8h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndnq_f16, float16x8_t)
+
+/*
+** test_vrndnq_f32:
+** frintn v0\.4s, v0\.4s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndnq_f32, float32x4_t)
+/*
+** test_vrndnq_f64:
+** frintn v0\.2d, v0\.2d
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndnq_f64, float64x2_t)
+
+/*
+** test_vrndns_f32:
+** frintn s0, s0
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndns_f32, float32_t)
new file mode 100644
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_neon_test.h"
+
+/*
+** test_vrndp_f16:
+** frintp v0\.4h, v0\.4h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndp_f16, float16x4_t)
+
+/*
+** test_vrndp_f32:
+** frintp v0\.2s, v0\.2s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndp_f32, float32x2_t)
+
+/*
+** test_vrndp_f64:
+** frintp d0, d0
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndp_f64, float64x1_t)
+
+/*
+** test_vrndpq_f16:
+** frintp v0\.8h, v0\.8h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndpq_f16, float16x8_t)
+
+/*
+** test_vrndpq_f32:
+** frintp v0\.4s, v0\.4s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndpq_f32, float32x4_t)
+/*
+** test_vrndpq_f64:
+** frintp v0\.2d, v0\.2d
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndpq_f64, float64x2_t)
new file mode 100644
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_neon_test.h"
+
+/*
+** test_vrndx_f16:
+** frintx v0\.4h, v0\.4h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndx_f16, float16x4_t)
+
+/*
+** test_vrndx_f32:
+** frintx v0\.2s, v0\.2s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndx_f32, float32x2_t)
+
+/*
+** test_vrndx_f64:
+** frintx d0, d0
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndx_f64, float64x1_t)
+
+/*
+** test_vrndxq_f16:
+** frintx v0\.8h, v0\.8h
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndxq_f16, float16x8_t)
+
+/*
+** test_vrndxq_f32:
+** frintx v0\.4s, v0\.4s
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndxq_f32, float32x4_t)
+/*
+** test_vrndxq_f64:
+** frintx v0\.2d, v0\.2d
+** ret
+*/
+TEST_UNIFORM_UNARY (vrndxq_f64, float64x2_t)