diff mbox series

[v2] rs6000: Add -mcpu=future support and built-in gating infrastructure

Message ID 20260408172244.1468334-1-kishan@linux.ibm.com
State New
Headers
Series [v2] rs6000: Add -mcpu=future support and built-in gating infrastructure |

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Commit Message

Kishan Parmar April 8, 2026, 5:22 p.m. UTC 
  Hello All,

Changes from v1:
	- Add missing ChangeLog info of new testcases.

Thank you,
Kishan

This patch introduces support for the -mcpu=future option, intended to
enable experimental processor features that may or may not be included
in future Power processors. The option serves as a placeholder for
development and evaluation purposes, and may be renamed if a
corresponding processor is defined.

In addition, this change adds support for gating rs6000 built-ins using a
new target predicate "future", corresponding to -mcpu=future. This
extends rs6000-gen-builtins.cc and rs6000-builtin.cc to recognize
[future] as a valid predicate, allowing new built-ins defined in .bif
files to be conditionally enabled.

Bootstrapped and Regtested on Power10 little-endian system, using the
--with-cpu=future configuration option.

2026-04-08  Kishan Parmar  <kishan@linux.ibm.com>

gcc/
	* config.gcc (powerpc*-*-*): Add support for supporting
	--with-cpu=future.
	* config/rs6000/aix71.h (ASM_CPU_SPEC): Pass -mfuture to the assembler
	if the user used the -mcpu=future option.
	* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle
	ENB_FUTURE and issue diagnostic requiring -mcpu=future.
	(rs6000_builtin_is_supported): Return TARGET_FUTURE for
	ENB_FUTURE built-ins.
	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
	_ARCH_FUTURE if -mcpu=future.
	* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro.
	(POWERPC_MASKS): Add OPTION_MASK_FUTURE.
	(rs6000_cpu_opt_value): New entry for 'future' via the RS6000_CPU macro.
	* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add
	BSTZ_FUTURE for future.
	(write_decls): Add ENB_FUTURE in bif_enable enum of generated header
	file.
	* config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro.
	* config/rs6000/rs6000-tables.opt: Regenerate.
	* config/rs6000/rs6000.cc (rs6000_machine_from_flags) If -mcpu=future,
	set the .machine directive to "future".
	(rs6000_opt_masks): Add entry for -mfuture.
	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Pass -mfuture to the assembler
	if the user used the -mcpu=future option.
	* config/rs6000/rs6000.opt (-mfuture): New option.
	* doc/invoke.texi (IBM RS/6000 and PowerPC Options): Document
	-mcpu=future.

gcc/testsuite/
	* gcc.target/powerpc/future-1.c: New test.
	* gcc.target/powerpc/future-2.c: Likewise.
---
 gcc/config.gcc                              |  4 ++--
 gcc/config/rs6000/aix71.h                   |  1 +
 gcc/config/rs6000/aix72.h                   |  1 +
 gcc/config/rs6000/aix73.h                   |  1 +
 gcc/config/rs6000/rs6000-builtin.cc         |  5 +++++
 gcc/config/rs6000/rs6000-c.cc               |  2 ++
 gcc/config/rs6000/rs6000-cpus.def           |  6 ++++++
 gcc/config/rs6000/rs6000-gen-builtins.cc    | 10 ++++++---
 gcc/config/rs6000/rs6000-opts.h             |  2 ++
 gcc/config/rs6000/rs6000-tables.opt         | 11 ++++++----
 gcc/config/rs6000/rs6000.cc                 |  3 +++
 gcc/config/rs6000/rs6000.h                  |  1 +
 gcc/config/rs6000/rs6000.opt                |  4 ++++
 gcc/doc/invoke.texi                         |  4 ++--
 gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +++++++++++
 gcc/testsuite/gcc.target/powerpc/future-2.c | 24 +++++++++++++++++++++
 16 files changed, 81 insertions(+), 11 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/future-1.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/future-2.c

Comments

Michael Meissner April 10, 2026, 3:48 a.m. UTC | #1 
On Wed, Apr 08, 2026 at 10:52:44PM +0530, Kishan Parmar wrote:
> Hello All,
> 
> Changes from v1:
> 	- Add missing ChangeLog info of new testcases.
> 
> Thank you,
> Kishan
> 
> This patch introduces support for the -mcpu=future option, intended to
> enable experimental processor features that may or may not be included
> in future Power processors. The option serves as a placeholder for
> development and evaluation purposes, and may be renamed if a
> corresponding processor is defined.
> 
> In addition, this change adds support for gating rs6000 built-ins using a
> new target predicate "future", corresponding to -mcpu=future. This
> extends rs6000-gen-builtins.cc and rs6000-builtin.cc to recognize
> [future] as a valid predicate, allowing new built-ins defined in .bif
> files to be conditionally enabled.
> 
> Bootstrapped and Regtested on Power10 little-endian system, using the
> --with-cpu=future configuration option.

This looks ok, when GCC 17 opens up you can apply it to the main
branch.  After an appropriate waiting period after GCC 16.1 ships, you
can back port it to GCC 16.
diff mbox series

Patch

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 34591bff970..42772b69dc8 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -555,7 +555,7 @@  powerpc*-*-*)
 	extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
 	extra_headers="${extra_headers} amo.h"
 	case x$with_cpu in
-	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xfuture|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
 		cpu_is_64bit=yes
 		;;
 	esac
@@ -5846,7 +5846,7 @@  case "${target}" in
 				eval "with_$which=405"
 				;;
 			"" | common | native \
-			| power[3456789] | power1[01] | power5+ | power6x \
+			| power[3456789] | power1[01] | future | power5+ | power6x \
 			| powerpc | powerpc64 | powerpc64le \
 			| rs64 \
 			| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 3093de62088..2331004344f 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@  do {									\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index 515eeebe5aa..9105f4254d0 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@  do {									\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index d89a4a197b3..8316decceae 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@  do {									\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index bbf60de3b1b..7661147d05c 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -139,6 +139,9 @@  rs6000_invalid_builtin (enum rs6000_gen_builtins fncode)
     case ENB_MMA:
       error ("%qs requires the %qs option", name, "-mmma");
       break;
+    case ENB_FUTURE:
+      error ("%qs requires the %qs option", name, "-mcpu=future");
+      break;
     default:
     case ENB_ALWAYS:
       gcc_unreachable ();
@@ -194,6 +197,8 @@  rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode)
       return TARGET_HTM;
     case ENB_MMA:
       return TARGET_MMA;
+    case ENB_FUTURE:
+      return TARGET_FUTURE;
     default:
       gcc_unreachable ();
     }
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index b230d9a7345..2e29e4ada21 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -437,6 +437,8 @@  rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
   if ((flags & OPTION_MASK_POWER11) != 0)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
+  if ((flags & OPTION_MASK_FUTURE) != 0)
+    rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
     rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 36be338493e..a110860acce 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -83,6 +83,10 @@ 
 #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER			\
 			      | OPTION_MASK_POWER11)
 
+/* -mcpu=future flags.  */
+#define FUTURE_MASKS_SERVER	(POWER11_MASKS_SERVER			\
+				 | OPTION_MASK_FUTURE)
+
 /* Flags that need to be turned off if -mno-vsx.  */
 #define OTHER_VSX_VECTOR_MASKS	(OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
 				 | OPTION_MASK_FLOAT128_KEYWORD		\
@@ -121,6 +125,7 @@ 
 				 | OPTION_MASK_FPRND			\
 				 | OPTION_MASK_POWER10			\
 				 | OPTION_MASK_POWER11			\
+				 | OPTION_MASK_FUTURE			\
 				 | OPTION_MASK_P10_FUSION		\
 				 | OPTION_MASK_HTM			\
 				 | OPTION_MASK_ISEL			\
@@ -249,6 +254,7 @@  RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER
 	    | OPTION_MASK_HTM)
 RS6000_CPU ("power10", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER)
 RS6000_CPU ("power11", PROCESSOR_POWER11, MASK_POWERPC64 | POWER11_MASKS_SERVER)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | FUTURE_MASKS_SERVER)
 RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
 RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
 	    | MASK_POWERPC64)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.cc b/gcc/config/rs6000/rs6000-gen-builtins.cc
index c7ae5899c5c..7436404cff5 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.cc
+++ b/gcc/config/rs6000/rs6000-gen-builtins.cc
@@ -232,6 +232,7 @@  enum bif_stanza
  BSTZ_P10,
  BSTZ_P10_64,
  BSTZ_MMA,
+ BSTZ_FUTURE,
  NUMBIFSTANZAS
 };
 
@@ -265,7 +266,8 @@  static stanza_entry stanza_map[NUMBIFSTANZAS] =
     { "htm",		BSTZ_HTM	},
     { "power10",	BSTZ_P10	},
     { "power10-64",	BSTZ_P10_64	},
-    { "mma",		BSTZ_MMA	}
+    { "mma",		BSTZ_MMA	},
+    { "future",	BSTZ_FUTURE	}
   };
 
 static const char *enable_string[NUMBIFSTANZAS] =
@@ -290,7 +292,8 @@  static const char *enable_string[NUMBIFSTANZAS] =
     "ENB_HTM",
     "ENB_P10",
     "ENB_P10_64",
-    "ENB_MMA"
+    "ENB_MMA",
+    "ENB_FUTURE"
   };
 
 /* Function modifiers provide special handling for const, pure, and fpmath
@@ -2249,7 +2252,8 @@  write_decls (void)
   fprintf (header_file, "  ENB_HTM,\n");
   fprintf (header_file, "  ENB_P10,\n");
   fprintf (header_file, "  ENB_P10_64,\n");
-  fprintf (header_file, "  ENB_MMA\n");
+  fprintf (header_file, "  ENB_MMA,\n");
+  fprintf (header_file, "  ENB_FUTURE\n");
   fprintf (header_file, "};\n\n");
 
   fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index db308065a43..c98cdc7d5c8 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -71,6 +71,8 @@  enum processor_type
    PROCESSOR_TITAN
 };
 
+/* Make -mtune=future use the same tuning decisions as -mtune=power11.  */
+#define PROCESSOR_FUTURE	PROCESSOR_POWER11
 
 /* Types of costly dependences.  */
 enum rs6000_dependence_cost
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 040c246c2f6..efc55260b2a 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -189,14 +189,17 @@  EnumValue
 Enum(rs6000_cpu_opt_value) String(power11) Value(53)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc) Value(54)
+Enum(rs6000_cpu_opt_value) String(future) Value(54)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55)
+Enum(rs6000_cpu_opt_value) String(powerpc) Value(55)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56)
+Enum(rs6000_cpu_opt_value) String(powerpc64) Value(56)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(rs64) Value(57)
+Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(57)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rs64) Value(58)
 
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 42a4d7bb622..c79a505914c 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5913,6 +5913,8 @@  rs6000_machine_from_flags (void)
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
 	     | OPTION_MASK_ALTIVEC);
 
+  if ((flags & (FUTURE_MASKS_SERVER & ~POWER11_MASKS_SERVER)) != 0)
+    return "future";
   if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
     return "power11";
   if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
@@ -24466,6 +24468,7 @@  static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "fprnd",			OPTION_MASK_FPRND,		false, true  },
   { "power10",			OPTION_MASK_POWER10,		false, true  },
   { "power11",			OPTION_MASK_POWER11,		false, false },
+  { "future",			OPTION_MASK_FUTURE,		false, false },
   { "hard-dfp",			OPTION_MASK_DFP,		false, true  },
   { "htm",			OPTION_MASK_HTM,		false, true  },
   { "isel",			OPTION_MASK_ISEL,		false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 2b90694cef1..2d3016db513 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -101,6 +101,7 @@ 
    you make changes here, make them also there.  */
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpower11; \
   mcpu=power10: -mpower10; \
   mcpu=power9: -mpower9; \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 2eeb45a4b71..2b6ec5222fc 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -595,6 +595,10 @@  Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
 mpower11
 Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
 
+;; Potential future machine
+mfuture
+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>, use %<-mcpu=future>)
+
 mprefixed
 Target Mask(PREFIXED) Var(rs6000_isa_flags)
 Generate (do not generate) prefixed memory instructions.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b01787d29fc..46adb9945f4 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -31570,8 +31570,8 @@  Supported values for @var{cpu_type} are @samp{401}, @samp{403},
 @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
 @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
 @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
-@samp{power9}, @samp{power10}, @samp{power11}, @samp{powerpc}, @samp{powerpc64},
-@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
+@samp{power9}, @samp{power10}, @samp{power11}, @samp{future}, @samp{powerpc},
+@samp{powerpc64}, @samp{powerpc64le}, @samp{rs64}, and @samp{native}.
 
 @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
 @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
diff --git a/gcc/testsuite/gcc.target/powerpc/future-1.c b/gcc/testsuite/gcc.target/powerpc/future-1.c
new file mode 100644
index 00000000000..7bd8e5ddbd0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/future-1.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+/* Basic check to see if the compiler supports -mcpu=future and if it defines
+   _ARCH_FUTURE.  */
+
+#ifndef _ARCH_FUTURE
+#error "-mcpu=future is not supported"
+#endif
+
+void foo (void)
+{
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/future-2.c b/gcc/testsuite/gcc.target/powerpc/future-2.c
new file mode 100644
index 00000000000..5552cefa3c2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/future-2.c
@@ -0,0 +1,24 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* Check if we can set the future target via a target attribute.  */
+
+__attribute__((__target__("cpu=power9")))
+void foo_p9 (void)
+{
+}
+
+__attribute__((__target__("cpu=power10")))
+void foo_p10 (void)
+{
+}
+
+__attribute__((__target__("cpu=power11")))
+void foo_p11 (void)
+{
+}
+
+__attribute__((__target__("cpu=future")))
+void foo_future (void)
+{
+}