diff mbox series

[X86] Fixes for AMD znver5 enablement

Message ID 20250917061503.3082469-1-umesh.kalvakuntla@amd.com
State New
Headers
Series [X86] Fixes for AMD znver5 enablement |

Commit Message

Umesh Kalvakuntla Sept. 17, 2025, 6:15 a.m. UTC 
  From: Umesh Kalvakuntla <Umesh.Kalvakuntla@amd.com>

- cpuid bit for prefetchi is different from Intel (https://docs.amd.com/v/u/en-US/24594_3.37)
- Fix cpu family model numbers
---
 gcc/common/config/i386/cpuinfo.h | 11 +++++++++++
 gcc/config/i386/cpuid.h          |  4 ++++
 2 files changed, 15 insertions(+)

Comments

Martin Jambor Sept. 22, 2025, 12:44 p.m. UTC | #1 
Hello,

On Wed, Sep 17 2025, Umesh Kalvakuntla wrote:
> From: Umesh Kalvakuntla <Umesh.Kalvakuntla@amd.com>
>
> - cpuid bit for prefetchi is different from Intel (https://docs.amd.com/v/u/en-US/24594_3.37)
> - Fix cpu family model numbers
> ---
>  gcc/common/config/i386/cpuinfo.h | 11 +++++++++++
>  gcc/config/i386/cpuid.h          |  4 ++++
>  2 files changed, 15 insertions(+)
>
> diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
> index c93ea07239a..6b45e1b0531 100644
> --- a/gcc/common/config/i386/cpuinfo.h
> +++ b/gcc/common/config/i386/cpuinfo.h
> @@ -313,6 +313,8 @@ get_amd_cpu (struct __processor_model *cpu_model,
>      case 0x1a:
>        cpu_model->__cpu_type = AMDFAM1AH;
>        if (model <= 0x77)
> +      if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
> +	  (model >= 0xd0 && model <= 0xd7))

I assume you did not want to leave the "if (model <= 0x77)" there but
wanted to remove it?

Thanks,

Martin

>  	{
>  	  cpu = "znver5";
>  	  CHECK___builtin_cpu_is ("znver5");
> @@ -1102,6 +1104,15 @@ get_available_features (struct __processor_model *cpu_model,
>  	set_feature (FEATURE_WBNOINVD);
>      }
>  
> +  if (ext_level >= 0x80000021)
> +    {
> +      __cpuid (0x80000021, eax, ebx, ecx, edx);
> +      if (eax & bit_AMD_PREFETCHI)
> +	{
> +	  set_feature (FEATURE_PREFETCHI);
> +	}
> +    }
> +
>  #undef set_feature
>  }
>  
> diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
> index afd4ef06e9f..dac01d887f1 100644
> --- a/gcc/config/i386/cpuid.h
> +++ b/gcc/config/i386/cpuid.h
> @@ -72,6 +72,10 @@
>  #define bit_CLZERO	(1 << 0)
>  #define bit_WBNOINVD	(1 << 9)
>  
> +/* Extended Features (%eax == 0x80000021) */
> +/* %eax */
> +#define bit_AMD_PREFETCHI (1 << 20) 
> +
>  /* Extended Features Leaf (%eax == 7, %ecx == 0) */
>  /* %ebx */
>  #define bit_FSGSBASE	(1 << 0)
> -- 
> 2.43.0
Umesh Kalvakuntla Sept. 23, 2025, 5:09 a.m. UTC | #2 
[AMD Official Use Only - AMD Internal Distribution Only]

> -----Original Message-----
> From: Martin Jambor <mjambor@suse.cz>
> Sent: Monday, September 22, 2025 6:14 PM
> To: Kalvakuntla, Umesh <Umesh.Kalvakuntla@amd.com>; gcc-
> patches@gcc.gnu.org
> Cc: Gopalasubramanian, Ganesh <Ganesh.Gopalasubramanian@amd.com>; Jan
> Hubicka <hubicka@ucw.cz>
> Subject: Re: [PATCH] [X86] Fixes for AMD znver5 enablement
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Hello,
>
> On Wed, Sep 17 2025, Umesh Kalvakuntla wrote:
> > From: Umesh Kalvakuntla <Umesh.Kalvakuntla@amd.com>
> >
> > - cpuid bit for prefetchi is different from Intel
> > (https://docs.amd.com/v/u/en-US/24594_3.37)
> > - Fix cpu family model numbers
> > ---
> >  gcc/common/config/i386/cpuinfo.h | 11 +++++++++++
> >  gcc/config/i386/cpuid.h          |  4 ++++
> >  2 files changed, 15 insertions(+)
> >
> > diff --git a/gcc/common/config/i386/cpuinfo.h
> > b/gcc/common/config/i386/cpuinfo.h
> > index c93ea07239a..6b45e1b0531 100644
> > --- a/gcc/common/config/i386/cpuinfo.h
> > +++ b/gcc/common/config/i386/cpuinfo.h
> > @@ -313,6 +313,8 @@ get_amd_cpu (struct __processor_model *cpu_model,
> >      case 0x1a:
> >        cpu_model->__cpu_type = AMDFAM1AH;
> >        if (model <= 0x77)
> > +      if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
> > +       (model >= 0xd0 && model <= 0xd7))
>
> I assume you did not want to leave the "if (model <= 0x77)" there but wanted to
> remove it?

Hello Martin,

Yes, my bad. Please find the updated patch.

Thanks,
Umesh

---
 gcc/common/config/i386/cpuinfo.h | 12 +++++++++++-
 gcc/config/i386/cpuid.h          |  4 ++++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index c93ea07239a..3f29f17e2a5 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -312,7 +312,8 @@ get_amd_cpu (struct __processor_model *cpu_model,
       break;
     case 0x1a:
       cpu_model->__cpu_type = AMDFAM1AH;
-      if (model <= 0x77)
+      if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
+         (model >= 0xd0 && model <= 0xd7))
        {
          cpu = "znver5";
          CHECK___builtin_cpu_is ("znver5");
@@ -1102,6 +1103,15 @@ get_available_features (struct __processor_model *cpu_model,
        set_feature (FEATURE_WBNOINVD);
     }

+  if (ext_level >= 0x80000021)
+    {
+      __cpuid (0x80000021, eax, ebx, ecx, edx);
+      if (eax & bit_AMD_PREFETCHI)
+       {
+         set_feature (FEATURE_PREFETCHI);
+       }
+    }
+
 #undef set_feature
 }

diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index afd4ef06e9f..dac01d887f1 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -72,6 +72,10 @@
 #define bit_CLZERO     (1 << 0)
 #define bit_WBNOINVD   (1 << 9)

+/* Extended Features (%eax == 0x80000021) */
+/* %eax */
+#define bit_AMD_PREFETCHI (1 << 20)
+
 /* Extended Features Leaf (%eax == 7, %ecx == 0) */
 /* %ebx */
 #define bit_FSGSBASE   (1 << 0)
--
2.43.0


>
> Thanks,
>
> Martin
>
> >       {
> >         cpu = "znver5";
> >         CHECK___builtin_cpu_is ("znver5"); @@ -1102,6 +1104,15 @@
> > get_available_features (struct __processor_model *cpu_model,
> >       set_feature (FEATURE_WBNOINVD);
> >      }
> >
> > +  if (ext_level >= 0x80000021)
> > +    {
> > +      __cpuid (0x80000021, eax, ebx, ecx, edx);
> > +      if (eax & bit_AMD_PREFETCHI)
> > +     {
> > +       set_feature (FEATURE_PREFETCHI);
> > +     }
> > +    }
> > +
> >  #undef set_feature
> >  }
> >
> > diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index
> > afd4ef06e9f..dac01d887f1 100644
> > --- a/gcc/config/i386/cpuid.h
> > +++ b/gcc/config/i386/cpuid.h
> > @@ -72,6 +72,10 @@
> >  #define bit_CLZERO   (1 << 0)
> >  #define bit_WBNOINVD (1 << 9)
> >
> > +/* Extended Features (%eax == 0x80000021) */
> > +/* %eax */
> > +#define bit_AMD_PREFETCHI (1 << 20)
> > +
> >  /* Extended Features Leaf (%eax == 7, %ecx == 0) */
> >  /* %ebx */
> >  #define bit_FSGSBASE (1 << 0)
> > --
> > 2.43.0
Umesh Kalvakuntla Sept. 26, 2025, 4:46 a.m. UTC | #3 
[AMD Official Use Only - AMD Internal Distribution Only]

Hello Martin,

Can you please commit this? I don't have the required rights.

Thanks,
Umesh

> -----Original Message-----
> From: Kalvakuntla, Umesh
> Sent: Tuesday, September 23, 2025 10:40 AM
> To: 'Martin Jambor' <mjambor@suse.cz>; gcc-patches@gcc.gnu.org
> Cc: Gopalasubramanian, Ganesh <Ganesh.Gopalasubramanian@amd.com>; Jan
> Hubicka <hubicka@ucw.cz>
> Subject: RE: [PATCH] [X86] Fixes for AMD znver5 enablement
>
>
>
> > -----Original Message-----
> > From: Martin Jambor <mjambor@suse.cz>
> > Sent: Monday, September 22, 2025 6:14 PM
> > To: Kalvakuntla, Umesh <Umesh.Kalvakuntla@amd.com>; gcc-
> > patches@gcc.gnu.org
> > Cc: Gopalasubramanian, Ganesh <Ganesh.Gopalasubramanian@amd.com>;
> Jan
> > Hubicka <hubicka@ucw.cz>
> > Subject: Re: [PATCH] [X86] Fixes for AMD znver5 enablement
> >
> > Caution: This message originated from an External Source. Use proper
> > caution when opening attachments, clicking links, or responding.
> >
> >
> > Hello,
> >
> > On Wed, Sep 17 2025, Umesh Kalvakuntla wrote:
> > > From: Umesh Kalvakuntla <Umesh.Kalvakuntla@amd.com>
> > >
> > > - cpuid bit for prefetchi is different from Intel
> > > (https://docs.amd.com/v/u/en-US/24594_3.37)
> > > - Fix cpu family model numbers
> > > ---
> > >  gcc/common/config/i386/cpuinfo.h | 11 +++++++++++
> > >  gcc/config/i386/cpuid.h          |  4 ++++
> > >  2 files changed, 15 insertions(+)
> > >
> > > diff --git a/gcc/common/config/i386/cpuinfo.h
> > > b/gcc/common/config/i386/cpuinfo.h
> > > index c93ea07239a..6b45e1b0531 100644
> > > --- a/gcc/common/config/i386/cpuinfo.h
> > > +++ b/gcc/common/config/i386/cpuinfo.h
> > > @@ -313,6 +313,8 @@ get_amd_cpu (struct __processor_model *cpu_model,
> > >      case 0x1a:
> > >        cpu_model->__cpu_type = AMDFAM1AH;
> > >        if (model <= 0x77)
> > > +      if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
> > > +       (model >= 0xd0 && model <= 0xd7))
> >
> > I assume you did not want to leave the "if (model <= 0x77)" there but
> > wanted to remove it?
>
> Hello Martin,
>
> Yes, my bad. Please find the updated patch.
>
> Thanks,
> Umesh
>
> ---
>  gcc/common/config/i386/cpuinfo.h | 12 +++++++++++-
>  gcc/config/i386/cpuid.h          |  4 ++++
>  2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
> index c93ea07239a..3f29f17e2a5 100644
> --- a/gcc/common/config/i386/cpuinfo.h
> +++ b/gcc/common/config/i386/cpuinfo.h
> @@ -312,7 +312,8 @@ get_amd_cpu (struct __processor_model *cpu_model,
>        break;
>      case 0x1a:
>        cpu_model->__cpu_type = AMDFAM1AH;
> -      if (model <= 0x77)
> +      if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
> +       (model >= 0xd0 && model <= 0xd7))
>       {
>         cpu = "znver5";
>         CHECK___builtin_cpu_is ("znver5");
> @@ -1102,6 +1103,15 @@ get_available_features (struct __processor_model
> *cpu_model,
>       set_feature (FEATURE_WBNOINVD);
>      }
>
> +  if (ext_level >= 0x80000021)
> +    {
> +      __cpuid (0x80000021, eax, ebx, ecx, edx);
> +      if (eax & bit_AMD_PREFETCHI)
> +     {
> +       set_feature (FEATURE_PREFETCHI);
> +     }
> +    }
> +
>  #undef set_feature
>  }
>
> diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index
> afd4ef06e9f..dac01d887f1 100644
> --- a/gcc/config/i386/cpuid.h
> +++ b/gcc/config/i386/cpuid.h
> @@ -72,6 +72,10 @@
>  #define bit_CLZERO   (1 << 0)
>  #define bit_WBNOINVD (1 << 9)
>
> +/* Extended Features (%eax == 0x80000021) */
> +/* %eax */
> +#define bit_AMD_PREFETCHI (1 << 20)
> +
>  /* Extended Features Leaf (%eax == 7, %ecx == 0) */
>  /* %ebx */
>  #define bit_FSGSBASE (1 << 0)
> --
> 2.43.0
>
>
> >
> > Thanks,
> >
> > Martin
> >
> > >       {
> > >         cpu = "znver5";
> > >         CHECK___builtin_cpu_is ("znver5"); @@ -1102,6 +1104,15 @@
> > > get_available_features (struct __processor_model *cpu_model,
> > >       set_feature (FEATURE_WBNOINVD);
> > >      }
> > >
> > > +  if (ext_level >= 0x80000021)
> > > +    {
> > > +      __cpuid (0x80000021, eax, ebx, ecx, edx);
> > > +      if (eax & bit_AMD_PREFETCHI)
> > > +     {
> > > +       set_feature (FEATURE_PREFETCHI);
> > > +     }
> > > +    }
> > > +
> > >  #undef set_feature
> > >  }
> > >
> > > diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index
> > > afd4ef06e9f..dac01d887f1 100644
> > > --- a/gcc/config/i386/cpuid.h
> > > +++ b/gcc/config/i386/cpuid.h
> > > @@ -72,6 +72,10 @@
> > >  #define bit_CLZERO   (1 << 0)
> > >  #define bit_WBNOINVD (1 << 9)
> > >
> > > +/* Extended Features (%eax == 0x80000021) */
> > > +/* %eax */
> > > +#define bit_AMD_PREFETCHI (1 << 20)
> > > +
> > >  /* Extended Features Leaf (%eax == 7, %ecx == 0) */
> > >  /* %ebx */
> > >  #define bit_FSGSBASE (1 << 0)
> > > --
> > > 2.43.0
Martin Jambor Sept. 29, 2025, 11:46 a.m. UTC | #4 
Hello,

On Fri, Sep 26 2025, Kalvakuntla, Umesh wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> Hello Martin,
>
> Can you please commit this? I don't have the required rights.

Honza is in favor, so I think I can.  Can you please write the
corresponding ChangeLog and provide information how the patch has been
tested?

Thank you,

Martin


>>  gcc/common/config/i386/cpuinfo.h | 12 +++++++++++-
>>  gcc/config/i386/cpuid.h          |  4 ++++
>>  2 files changed, 15 insertions(+), 1 deletion(-)
>>
>> diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
>> index c93ea07239a..3f29f17e2a5 100644
>> --- a/gcc/common/config/i386/cpuinfo.h
>> +++ b/gcc/common/config/i386/cpuinfo.h
>> @@ -312,7 +312,8 @@ get_amd_cpu (struct __processor_model *cpu_model,
>>        break;
>>      case 0x1a:
>>        cpu_model->__cpu_type = AMDFAM1AH;
>> -      if (model <= 0x77)
>> +      if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
>> +       (model >= 0xd0 && model <= 0xd7))
>>       {
>>         cpu = "znver5";
>>         CHECK___builtin_cpu_is ("znver5");
>> @@ -1102,6 +1103,15 @@ get_available_features (struct __processor_model
>> *cpu_model,
>>       set_feature (FEATURE_WBNOINVD);
>>      }
>>
>> +  if (ext_level >= 0x80000021)
>> +    {
>> +      __cpuid (0x80000021, eax, ebx, ecx, edx);
>> +      if (eax & bit_AMD_PREFETCHI)
>> +     {
>> +       set_feature (FEATURE_PREFETCHI);
>> +     }
>> +    }
>> +
>>  #undef set_feature
>>  }
>>
>> diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index
>> afd4ef06e9f..dac01d887f1 100644
>> --- a/gcc/config/i386/cpuid.h
>> +++ b/gcc/config/i386/cpuid.h
>> @@ -72,6 +72,10 @@
>>  #define bit_CLZERO   (1 << 0)
>>  #define bit_WBNOINVD (1 << 9)
>>
>> +/* Extended Features (%eax == 0x80000021) */
>> +/* %eax */
>> +#define bit_AMD_PREFETCHI (1 << 20)
>> +
>>  /* Extended Features Leaf (%eax == 7, %ecx == 0) */
>>  /* %ebx */
>>  #define bit_FSGSBASE (1 << 0)
>> --
>> 2.43.0
>>
>>
Umesh Kalvakuntla Sept. 29, 2025, 1:02 p.m. UTC | #5 
Hello,

> -----Original Message-----
> From: Martin Jambor <mjambor@suse.cz>
> Sent: Monday, September 29, 2025 5:16 PM
> To: Kalvakuntla, Umesh <Umesh.Kalvakuntla@amd.com>; gcc-
> patches@gcc.gnu.org
> Cc: Gopalasubramanian, Ganesh <Ganesh.Gopalasubramanian@amd.com>; Jan
> Hubicka <hubicka@ucw.cz>
> Subject: RE: [PATCH] [X86] Fixes for AMD znver5 enablement
> 
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
> 
> 
> Hello,
> 
> On Fri, Sep 26 2025, Kalvakuntla, Umesh wrote:
> > [AMD Official Use Only - AMD Internal Distribution Only]
> >
> > Hello Martin,
> >
> > Can you please commit this? I don't have the required rights.
> 
> Honza is in favor, so I think I can.  Can you please write the corresponding
> ChangeLog and provide information how the patch has been tested?

Tested the patch with below command on znver5 machine:
$ gcc -Q -march=native --help=target | grep prefetchi
 -mprefetchi                           [enabled]

Model numbers are updated as per specification.

Updated patch with Changelog :

---
 gcc/ChangeLog                    |  7 +++++++
 gcc/common/config/i386/cpuinfo.h | 12 +++++++++++-
 gcc/config/i386/cpuid.h          |  4 ++++
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 63fd0f27d03..60a8a1af697 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2025-09-29  Umesh Kalvakuntla <Umesh.Kalvakuntla@amd.com>
+
+	* common/config/i386/cpuinfo.h (get_amd_cpu): 
+	Fix znver5 family model numbers.
+	(get_available_features): Set FEATURE_PREFETCHI for bit_AMD_PREFETCHI.
+	* config/i386/cpuid.h (bit_AMD_PREFETCHI): New Macro.
+
 2025-09-28  liuhongt  <hongtao.liu@intel.com>
 
 	PR target/121970
diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index c93ea07239a..3f29f17e2a5 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -312,7 +312,8 @@ get_amd_cpu (struct __processor_model *cpu_model,
       break;
     case 0x1a:
       cpu_model->__cpu_type = AMDFAM1AH;
-      if (model <= 0x77)
+      if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
+	  (model >= 0xd0 && model <= 0xd7))
 	{
 	  cpu = "znver5";
 	  CHECK___builtin_cpu_is ("znver5");
@@ -1102,6 +1103,15 @@ get_available_features (struct __processor_model *cpu_model,
 	set_feature (FEATURE_WBNOINVD);
     }
 
+  if (ext_level >= 0x80000021)
+    {
+      __cpuid (0x80000021, eax, ebx, ecx, edx);
+      if (eax & bit_AMD_PREFETCHI)
+	{
+	  set_feature (FEATURE_PREFETCHI);
+	}
+    }
+
 #undef set_feature
 }
 
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index afd4ef06e9f..dac01d887f1 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -72,6 +72,10 @@
 #define bit_CLZERO	(1 << 0)
 #define bit_WBNOINVD	(1 << 9)
 
+/* Extended Features (%eax == 0x80000021) */
+/* %eax */
+#define bit_AMD_PREFETCHI (1 << 20) 
+
 /* Extended Features Leaf (%eax == 7, %ecx == 0) */
 /* %ebx */
 #define bit_FSGSBASE	(1 << 0)
Martin Jambor Oct. 10, 2025, 1:54 p.m. UTC | #6 
Hello,

On Mon, Sep 29 2025, Kalvakuntla, Umesh wrote:
> Hello,
>
>> -----Original Message-----
>> From: Martin Jambor <mjambor@suse.cz>
>> Sent: Monday, September 29, 2025 5:16 PM
>> To: Kalvakuntla, Umesh <Umesh.Kalvakuntla@amd.com>; gcc-
>> patches@gcc.gnu.org
>> Cc: Gopalasubramanian, Ganesh <Ganesh.Gopalasubramanian@amd.com>; Jan
>> Hubicka <hubicka@ucw.cz>
>> Subject: RE: [PATCH] [X86] Fixes for AMD znver5 enablement
>> 
>> Caution: This message originated from an External Source. Use proper caution
>> when opening attachments, clicking links, or responding.
>> 
>> 
>> Hello,
>> 
>> On Fri, Sep 26 2025, Kalvakuntla, Umesh wrote:
>> > [AMD Official Use Only - AMD Internal Distribution Only]
>> >
>> > Hello Martin,
>> >
>> > Can you please commit this? I don't have the required rights.
>> 
>> Honza is in favor, so I think I can.  Can you please write the corresponding
>> ChangeLog and provide information how the patch has been tested?
>
> Tested the patch with below command on znver5 machine:
> $ gcc -Q -march=native --help=target | grep prefetchi
>  -mprefetchi                           [enabled]
>
> Model numbers are updated as per specification.
>
> Updated patch with Changelog :

I have pushed the following to the master branch.

Thanks,

Martin


From 578c322e7d6a6b5e392d7b587179e3031b7a8daa Mon Sep 17 00:00:00 2001
From: Umesh Kalvakuntla <Umesh.Kalvakuntla@amd.com>
Date: Wed, 8 Oct 2025 18:50:37 +0200
Subject: [PATCH] x86: Fixes for AMD znver5 enablement

This patch fixes cpu family model numbers for znver5 and uses the
correct cpuid bit for prefetchi which is different from Intel
(https://docs.amd.com/v/u/en-US/24594_3.37).

2025-09-29  Umesh Kalvakuntla <Umesh.Kalvakuntla@amd.com>

	* common/config/i386/cpuinfo.h (get_amd_cpu): Fix znver5 family
	model numbers.
	(get_available_features): Set FEATURE_PREFETCHI for bit_AMD_PREFETCHI.
	* config/i386/cpuid.h (bit_AMD_PREFETCHI): New Macro.
---
 gcc/common/config/i386/cpuinfo.h | 12 +++++++++++-
 gcc/config/i386/cpuid.h          |  4 ++++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index c93ea07239a..3f29f17e2a5 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -312,7 +312,8 @@ get_amd_cpu (struct __processor_model *cpu_model,
       break;
     case 0x1a:
       cpu_model->__cpu_type = AMDFAM1AH;
-      if (model <= 0x77)
+      if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
+	  (model >= 0xd0 && model <= 0xd7))
 	{
 	  cpu = "znver5";
 	  CHECK___builtin_cpu_is ("znver5");
@@ -1102,6 +1103,15 @@ get_available_features (struct __processor_model *cpu_model,
 	set_feature (FEATURE_WBNOINVD);
     }
 
+  if (ext_level >= 0x80000021)
+    {
+      __cpuid (0x80000021, eax, ebx, ecx, edx);
+      if (eax & bit_AMD_PREFETCHI)
+	{
+	  set_feature (FEATURE_PREFETCHI);
+	}
+    }
+
 #undef set_feature
 }
 
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index afd4ef06e9f..25e28352f59 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -72,6 +72,10 @@
 #define bit_CLZERO	(1 << 0)
 #define bit_WBNOINVD	(1 << 9)
 
+/* Extended Features (%eax == 0x80000021) */
+/* %eax */
+#define bit_AMD_PREFETCHI (1 << 20)
+
 /* Extended Features Leaf (%eax == 7, %ecx == 0) */
 /* %ebx */
 #define bit_FSGSBASE	(1 << 0)
diff mbox series

Patch

diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index c93ea07239a..6b45e1b0531 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -313,6 +313,8 @@  get_amd_cpu (struct __processor_model *cpu_model,
     case 0x1a:
       cpu_model->__cpu_type = AMDFAM1AH;
       if (model <= 0x77)
+      if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
+	  (model >= 0xd0 && model <= 0xd7))
 	{
 	  cpu = "znver5";
 	  CHECK___builtin_cpu_is ("znver5");
@@ -1102,6 +1104,15 @@  get_available_features (struct __processor_model *cpu_model,
 	set_feature (FEATURE_WBNOINVD);
     }
 
+  if (ext_level >= 0x80000021)
+    {
+      __cpuid (0x80000021, eax, ebx, ecx, edx);
+      if (eax & bit_AMD_PREFETCHI)
+	{
+	  set_feature (FEATURE_PREFETCHI);
+	}
+    }
+
 #undef set_feature
 }
 
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index afd4ef06e9f..dac01d887f1 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -72,6 +72,10 @@ 
 #define bit_CLZERO	(1 << 0)
 #define bit_WBNOINVD	(1 << 9)
 
+/* Extended Features (%eax == 0x80000021) */
+/* %eax */
+#define bit_AMD_PREFETCHI (1 << 20) 
+
 /* Extended Features Leaf (%eax == 7, %ecx == 0) */
 /* %ebx */
 #define bit_FSGSBASE	(1 << 0)