i386: Verify that argument registers are spilled properly

Message ID 20250309140545.1108146-1-hjl.tools@gmail.com
State New
Headers
Series i386: Verify that argument registers are spilled properly |

Commit Message

H.J. Lu March 9, 2025, 2:05 p.m. UTC
  RDI, RSI, RDX and RCX registers are used to pass arguments in 64-bit
mode.  EAX, EDX and ECX registers are used to pass arguments in 32-bit
mode.  Add tests to verify that argument registers are spilled properly.

	PR target/119171
	* gcc.target/i386/pr119171-1.c: New test.
	* gcc.target/i386/pr119171-2.c: Likewise.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
---
 gcc/testsuite/gcc.target/i386/pr119171-1.c | 14 ++++++++++++++
 gcc/testsuite/gcc.target/i386/pr119171-2.c | 14 ++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-2.c
  

Comments

Uros Bizjak March 9, 2025, 9:46 p.m. UTC | #1
On Sun, Mar 9, 2025 at 3:05 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> RDI, RSI, RDX and RCX registers are used to pass arguments in 64-bit
> mode.  EAX, EDX and ECX registers are used to pass arguments in 32-bit
> mode.  Add tests to verify that argument registers are spilled properly.
>
>         PR target/119171
>         * gcc.target/i386/pr119171-1.c: New test.
>         * gcc.target/i386/pr119171-2.c: Likewise.
>
> Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
> ---
>  gcc/testsuite/gcc.target/i386/pr119171-1.c | 14 ++++++++++++++
>  gcc/testsuite/gcc.target/i386/pr119171-2.c | 14 ++++++++++++++
>  2 files changed, 28 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-1.c
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-2.c
>
> diff --git a/gcc/testsuite/gcc.target/i386/pr119171-1.c b/gcc/testsuite/gcc.target/i386/pr119171-1.c
> new file mode 100644
> index 00000000000..a017e6e215f
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr119171-1.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile { target { ! ia32 } } } */
> +/* { dg-options "-O2" } */
> +
> +extern long a1, a2, a3, a4;
> +extern void foo (void *, void *, void *, void *);
> +void
> +bar (void *rdi, void *rsi, void *rdx, void *rcx)
> +{
> +  asm ("" : "=D"(a1) : "D"(0));
> +  asm ("" : "=S"(a2) : "S"(0));
> +  asm ("" : "=d"(a3) : "d"(0));
> +  asm ("" : "=c"(a4) : "c"(0));
> +  foo (rdi, rsi, rdx, rcx);
> +}
> diff --git a/gcc/testsuite/gcc.target/i386/pr119171-2.c b/gcc/testsuite/gcc.target/i386/pr119171-2.c
> new file mode 100644
> index 00000000000..83b705b27c3
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr119171-2.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile { target ia32 } } */
> +/* { dg-options "-O2" } */

You can add -mregparm=3 to the compile flags.

But, I fail to see what you want to test here? There are no scan asm
dg-directives, and these tests work for me OK.

Uros.

> +
> +extern long a1, a2, a3;
> +extern void foo (void *, void *, void *) __attribute__ ((regparm (3)));
> +__attribute__ ((regparm (3)))
> +void
> +bar (void *eax, void *edx, void *ecx)
> +{
> +  asm ("" : "=a"(a1) : "a"(0));
> +  asm ("" : "=d"(a2) : "d"(0));
> +  asm ("" : "=c"(a3) : "c"(0));
> +  foo (eax, edx, ecx);
> +}
> --
> 2.48.1
>
  
Sam James March 9, 2025, 9:54 p.m. UTC | #2
Uros Bizjak <ubizjak@gmail.com> writes:

> On Sun, Mar 9, 2025 at 3:05 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>>
>> RDI, RSI, RDX and RCX registers are used to pass arguments in 64-bit
>> mode.  EAX, EDX and ECX registers are used to pass arguments in 32-bit
>> mode.  Add tests to verify that argument registers are spilled properly.
>>
>>         PR target/119171
>>         * gcc.target/i386/pr119171-1.c: New test.
>>         * gcc.target/i386/pr119171-2.c: Likewise.
>>
>> Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
>> ---
>>  gcc/testsuite/gcc.target/i386/pr119171-1.c | 14 ++++++++++++++
>>  gcc/testsuite/gcc.target/i386/pr119171-2.c | 14 ++++++++++++++
>>  2 files changed, 28 insertions(+)
>>  create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-1.c
>>  create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-2.c
>>
>> diff --git a/gcc/testsuite/gcc.target/i386/pr119171-1.c b/gcc/testsuite/gcc.target/i386/pr119171-1.c
>> new file mode 100644
>> index 00000000000..a017e6e215f
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/i386/pr119171-1.c
>> @@ -0,0 +1,14 @@
>> +/* { dg-do compile { target { ! ia32 } } } */
>> +/* { dg-options "-O2" } */
>> +
>> +extern long a1, a2, a3, a4;
>> +extern void foo (void *, void *, void *, void *);
>> +void
>> +bar (void *rdi, void *rsi, void *rdx, void *rcx)
>> +{
>> +  asm ("" : "=D"(a1) : "D"(0));
>> +  asm ("" : "=S"(a2) : "S"(0));
>> +  asm ("" : "=d"(a3) : "d"(0));
>> +  asm ("" : "=c"(a4) : "c"(0));
>> +  foo (rdi, rsi, rdx, rcx);
>> +}
>> diff --git a/gcc/testsuite/gcc.target/i386/pr119171-2.c b/gcc/testsuite/gcc.target/i386/pr119171-2.c
>> new file mode 100644
>> index 00000000000..83b705b27c3
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/i386/pr119171-2.c
>> @@ -0,0 +1,14 @@
>> +/* { dg-do compile { target ia32 } } */
>> +/* { dg-options "-O2" } */
>
> You can add -mregparm=3 to the compile flags.
>
> But, I fail to see what you want to test here? There are no scan asm
> dg-directives, and these tests work for me OK.

I think it's a gap in testing H.J. noticed when working on a local patch
(PR119171).
  
H.J. Lu March 9, 2025, 10:24 p.m. UTC | #3
On Sun, Mar 9, 2025 at 2:54 PM Sam James <sam@gentoo.org> wrote:
>
> Uros Bizjak <ubizjak@gmail.com> writes:
>
> > On Sun, Mar 9, 2025 at 3:05 PM H.J. Lu <hjl.tools@gmail.com> wrote:
> >>
> >> RDI, RSI, RDX and RCX registers are used to pass arguments in 64-bit
> >> mode.  EAX, EDX and ECX registers are used to pass arguments in 32-bit
> >> mode.  Add tests to verify that argument registers are spilled properly.
> >>
> >>         PR target/119171
> >>         * gcc.target/i386/pr119171-1.c: New test.
> >>         * gcc.target/i386/pr119171-2.c: Likewise.
> >>
> >> Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
> >> ---
> >>  gcc/testsuite/gcc.target/i386/pr119171-1.c | 14 ++++++++++++++
> >>  gcc/testsuite/gcc.target/i386/pr119171-2.c | 14 ++++++++++++++
> >>  2 files changed, 28 insertions(+)
> >>  create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-1.c
> >>  create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-2.c
> >>
> >> diff --git a/gcc/testsuite/gcc.target/i386/pr119171-1.c b/gcc/testsuite/gcc.target/i386/pr119171-1.c
> >> new file mode 100644
> >> index 00000000000..a017e6e215f
> >> --- /dev/null
> >> +++ b/gcc/testsuite/gcc.target/i386/pr119171-1.c
> >> @@ -0,0 +1,14 @@
> >> +/* { dg-do compile { target { ! ia32 } } } */
> >> +/* { dg-options "-O2" } */
> >> +
> >> +extern long a1, a2, a3, a4;
> >> +extern void foo (void *, void *, void *, void *);
> >> +void
> >> +bar (void *rdi, void *rsi, void *rdx, void *rcx)
> >> +{
> >> +  asm ("" : "=D"(a1) : "D"(0));
> >> +  asm ("" : "=S"(a2) : "S"(0));
> >> +  asm ("" : "=d"(a3) : "d"(0));
> >> +  asm ("" : "=c"(a4) : "c"(0));
> >> +  foo (rdi, rsi, rdx, rcx);
> >> +}
> >> diff --git a/gcc/testsuite/gcc.target/i386/pr119171-2.c b/gcc/testsuite/gcc.target/i386/pr119171-2.c
> >> new file mode 100644
> >> index 00000000000..83b705b27c3
> >> --- /dev/null
> >> +++ b/gcc/testsuite/gcc.target/i386/pr119171-2.c
> >> @@ -0,0 +1,14 @@
> >> +/* { dg-do compile { target ia32 } } */
> >> +/* { dg-options "-O2" } */
> >
> > You can add -mregparm=3 to the compile flags.
> >
> > But, I fail to see what you want to test here? There are no scan asm
> > dg-directives, and these tests work for me OK.
>
> I think it's a gap in testing H.J. noticed when working on a local patch
> (PR119171).

That is correct.  I will send v2 with -mregparm=3.
  

Patch

diff --git a/gcc/testsuite/gcc.target/i386/pr119171-1.c b/gcc/testsuite/gcc.target/i386/pr119171-1.c
new file mode 100644
index 00000000000..a017e6e215f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr119171-1.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2" } */
+
+extern long a1, a2, a3, a4;
+extern void foo (void *, void *, void *, void *);
+void
+bar (void *rdi, void *rsi, void *rdx, void *rcx)
+{
+  asm ("" : "=D"(a1) : "D"(0));
+  asm ("" : "=S"(a2) : "S"(0));
+  asm ("" : "=d"(a3) : "d"(0));
+  asm ("" : "=c"(a4) : "c"(0));
+  foo (rdi, rsi, rdx, rcx);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr119171-2.c b/gcc/testsuite/gcc.target/i386/pr119171-2.c
new file mode 100644
index 00000000000..83b705b27c3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr119171-2.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2" } */
+
+extern long a1, a2, a3;
+extern void foo (void *, void *, void *) __attribute__ ((regparm (3)));
+__attribute__ ((regparm (3)))
+void
+bar (void *eax, void *edx, void *ecx)
+{
+  asm ("" : "=a"(a1) : "a"(0));
+  asm ("" : "=d"(a2) : "d"(0));
+  asm ("" : "=c"(a3) : "c"(0));
+  foo (eax, edx, ecx);
+}