From patchwork Tue Feb 11 12:49:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cheng X-Patchwork-Id: 106328 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1E4373858428 for ; Tue, 11 Feb 2025 12:49:53 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1E4373858428 X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 017083858D33 for ; Tue, 11 Feb 2025 12:48:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 017083858D33 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 017083858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1739278130; cv=none; b=Tn/VtR94Auabbtr1S3eaQV+I3Fx0hOG0iFKyemJFtnPlg5/cMwmmPiUT76B+8Ttn9PQOuDCeM3xIbix4Jg+vgHvaAWSYRX5On7RVNMZZYjCzEYceIQClXINFzLV/o1E8g+1l9GuYYRx1zs7MxROjydP/qSllbVrYFx+2KgwsNX0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1739278130; c=relaxed/simple; bh=PEmAMIzvf0uG0HWpZ5qXEEY2gboBl7UL7Rf56ROch38=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=ENXW+oHxGpxSFAdEP7g++ZKeFqA4OdolY1d6QD0DH3bwR+gWpD/ljF1ahpisO0gdI4LzvcQiUWisKdPj5ZnKEo0ZwMltBdMDzoKhIVuGi7jrFGdDINkRkLD6x03i/ewTc6y/KWZeW1/zJvugq0uA46NpSVv4Sx8EspwjEFsS7VM= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 017083858D33 Received: from loongson.cn (unknown [10.20.4.107]) by gateway (Coremail) with SMTP id _____8Bx12kvR6tn4yhyAA--.2107S3; Tue, 11 Feb 2025 20:48:47 +0800 (CST) Received: from loongson-pc.loongson.cn (unknown [10.20.4.107]) by front1 (Coremail) with SMTP id qMiowMDxH+UjR6tnQAMMAA--.47337S4; Tue, 11 Feb 2025 20:48:46 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn Subject: [PATCH 2/3] LoongArch: Split the function loongarch_cpu_cpp_builtins into two functions. Date: Tue, 11 Feb 2025 20:49:16 +0800 Message-Id: <20250211124917.28685-3-chenglulu@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20250211124917.28685-1-chenglulu@loongson.cn> References: <20250211124917.28685-1-chenglulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMDxH+UjR6tnQAMMAA--.47337S4 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoW3JF48uw1DCFWDXr4DtF45twc_yoW7WFWxpr yUuryYyrW8XFsxA393A398Xrs0vr1UW34IvFyaqrW8CFW8G340qr1FkrZ8XF1UXaykJ3Wj 9r1xJay7uF4UAwcCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkjb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4 xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JF0_Jw1lYx0Ex4A2jsIE14v2 6r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwI xGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480 Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7 IYx2IY67AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k2 6cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxV AFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07jOb18UUUUU= X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, PROLO_LEO1, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org Split the implementation of the function loongarch_cpu_cpp_builtins into two parts: 1. Macro definitions that do not change (only considering 64-bit architecture) 2. Macro definitions that change with different compilation options. gcc/ChangeLog: * config/loongarch/loongarch-c.cc (builtin_undef): New macro. (loongarch_cpu_cpp_builtins): Split to loongarch_update_cpp_builtins and loongarch_define_unconditional_macros. (loongarch_def_or_undef): New functions. (loongarch_define_unconditional_macros): Likewise. (loongarch_update_cpp_builtins): Likewise. Change-Id: Ifae73ffa2a07a595ed2a7f6ab7b82d8f51328a2a --- gcc/config/loongarch/loongarch-c.cc | 109 +++++++++++++++++----------- 1 file changed, 66 insertions(+), 43 deletions(-) diff --git a/gcc/config/loongarch/loongarch-c.cc b/gcc/config/loongarch/loongarch-c.cc index 5d8c02e094b..9fe911325ab 100644 --- a/gcc/config/loongarch/loongarch-c.cc +++ b/gcc/config/loongarch/loongarch-c.cc @@ -31,13 +31,21 @@ along with GCC; see the file COPYING3. If not see #define preprocessing_asm_p() (cpp_get_options (pfile)->lang == CLK_ASM) #define builtin_define(TXT) cpp_define (pfile, TXT) +#define builtin_undef(TXT) cpp_undef (pfile, TXT) #define builtin_assert(TXT) cpp_assert (pfile, TXT) -void -loongarch_cpu_cpp_builtins (cpp_reader *pfile) +static void +loongarch_def_or_undef (bool def_p, const char *macro, cpp_reader *pfile) +{ + if (def_p) + cpp_define (pfile, macro); + else + cpp_undef (pfile, macro); +} + +static void +loongarch_define_unconditional_macros (cpp_reader *pfile) { - builtin_assert ("machine=loongarch"); - builtin_assert ("cpu=loongarch"); builtin_define ("__loongarch__"); builtin_define_with_value ("__loongarch_arch", @@ -66,45 +74,6 @@ loongarch_cpu_cpp_builtins (cpp_reader *pfile) builtin_define ("__loongarch_lp64"); } - /* These defines reflect the ABI in use, not whether the - FPU is directly accessible. */ - if (TARGET_DOUBLE_FLOAT_ABI) - builtin_define ("__loongarch_double_float=1"); - else if (TARGET_SINGLE_FLOAT_ABI) - builtin_define ("__loongarch_single_float=1"); - - if (TARGET_DOUBLE_FLOAT_ABI || TARGET_SINGLE_FLOAT_ABI) - builtin_define ("__loongarch_hard_float=1"); - else - builtin_define ("__loongarch_soft_float=1"); - - - /* ISA Extensions. */ - if (TARGET_DOUBLE_FLOAT) - builtin_define ("__loongarch_frlen=64"); - else if (TARGET_SINGLE_FLOAT) - builtin_define ("__loongarch_frlen=32"); - else - builtin_define ("__loongarch_frlen=0"); - - if (TARGET_HARD_FLOAT && ISA_HAS_FRECIPE) - builtin_define ("__loongarch_frecipe"); - - if (ISA_HAS_LSX) - { - builtin_define ("__loongarch_simd"); - builtin_define ("__loongarch_sx"); - - if (!ISA_HAS_LASX) - builtin_define ("__loongarch_simd_width=128"); - } - - if (ISA_HAS_LASX) - { - builtin_define ("__loongarch_asx"); - builtin_define ("__loongarch_simd_width=256"); - } - /* ISA evolution features */ int max_v_major = 1, max_v_minor = 0; @@ -145,7 +114,61 @@ loongarch_cpu_cpp_builtins (cpp_reader *pfile) builtin_define_with_int_value ("_LOONGARCH_SZPTR", POINTER_SIZE); builtin_define_with_int_value ("_LOONGARCH_FPSET", 32); builtin_define_with_int_value ("_LOONGARCH_SPFPSET", 32); +} + +static void +loongarch_update_cpp_builtins (cpp_reader *pfile) +{ + builtin_undef ("__loongarch_double_float"); + builtin_undef ("__loongarch_single_float"); + /* These defines reflect the ABI in use, not whether the + FPU is directly accessible. */ + if (TARGET_DOUBLE_FLOAT_ABI) + builtin_define ("__loongarch_double_float=1"); + else if (TARGET_SINGLE_FLOAT_ABI) + builtin_define ("__loongarch_single_float=1"); + + builtin_undef ("__loongarch_soft_float"); + builtin_undef ("__loongarch_hard_float"); + if (TARGET_DOUBLE_FLOAT_ABI || TARGET_SINGLE_FLOAT_ABI) + builtin_define ("__loongarch_hard_float=1"); + else + builtin_define ("__loongarch_soft_float=1"); + + + /* ISA Extensions. */ + if (TARGET_DOUBLE_FLOAT) + builtin_define ("__loongarch_frlen=64"); + else if (TARGET_SINGLE_FLOAT) + builtin_define ("__loongarch_frlen=32"); + else + builtin_define ("__loongarch_frlen=0"); + + loongarch_def_or_undef (TARGET_HARD_FLOAT && ISA_HAS_FRECIPE, + "__loongarch_frecipe", pfile); + + loongarch_def_or_undef (ISA_HAS_LSX, "__loongarch_simd", pfile); + loongarch_def_or_undef (ISA_HAS_LSX, "__loongarch_sx", pfile); + loongarch_def_or_undef (ISA_HAS_LASX, "__loongarch_asx", pfile); + + builtin_undef ("__loongarch_simd_width"); + if (ISA_HAS_LSX) + { + if (ISA_HAS_LASX) + builtin_define ("__loongarch_simd_width=256"); + else + builtin_define ("__loongarch_simd_width=128"); + } +} + +void +loongarch_cpu_cpp_builtins (cpp_reader *pfile) +{ + builtin_assert ("machine=loongarch"); + builtin_assert ("cpu=loongarch"); + loongarch_define_unconditional_macros (pfile); + loongarch_update_cpp_builtins (pfile); } /* Hook to validate the current #pragma GCC target and set the state, and