diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc
index bdb1356af91..003963f2a19 100644
--- a/gcc/ira-costs.cc
+++ b/gcc/ira-costs.cc
@@ -1572,7 +1572,10 @@ scan_one_insn (rtx_insn *insn)
       && (! ira_use_lra_p || ! pic_offset_table_rtx
 	  || ! contains_symbol_ref_p (XEXP (note, 0))))
     {
-      enum reg_class cl = GENERAL_REGS;
+      /* Costs for NO_REGS are used in cost calculation on the
+	 1st pass when the preferred register classes are not
+	 known yet.  In this case we take the best scenario.  */
+      enum reg_class cl = NO_REGS;
       rtx reg = SET_DEST (set);
       int num = COST_INDEX (REGNO (reg));
 
diff --git a/gcc/testsuite/gcc.target/i386/pr108707.c b/gcc/testsuite/gcc.target/i386/pr108707.c
new file mode 100644
index 00000000000..6405cfe7cdc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr108707.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-not {(?n)vfmadd[1-3]*ps.*\(} { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times {(?n)vfmadd[1-3]*ps[ \t]*} 3 } } */
+
+#include<immintrin.h>
+
+void
+foo (__m512 pv, __m512 a, __m512 b, __m512 c,
+     __m512* pdest, __m512* p1)
+{
+  __m512 t = *p1;
+    pdest[0] = _mm512_fmadd_ps (t, pv, a);
+    pdest[1] = _mm512_fmadd_ps (t, pv, b);
+    pdest[2] = _mm512_fmadd_ps (t, pv, c);
+}