[60/61] Check anti-dependence between 0 and 3 for loads

Message ID 20250131171232.1018281-62-aleksandar.rakic@htecgroup.com
State New
Headers
Series Improve Mips target |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gcc_build--master-arm fail Patch failed to apply
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Commit Message

Aleksandar Rakic Jan. 31, 2025, 5:13 p.m. UTC
  From: Chao-ying Fu <cfu@wavecomp.com>

gcc/
	* config/mips/mips.md (join2_load_store<JOIN_MODE:mode>): Check
	operand 0 and 3. Assert other two operands do not overlap after
	they are reordered.
	(*join2_loadhi): Same.

Cherry-picked 63175687761e51dfe2f75dfab7b4de7f44bb4abe
from https://github.com/MIPS/gcc

Signed-off-by: Chao-ying Fu <cfu@mips.com>
Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
---
 gcc/config/mips/mips.md | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
  

Patch

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 52abb9c1119..c5603c1aa9e 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -8130,7 +8130,7 @@ 
     /* Reg-renaming pass reuses base register if it is dead after bonded loads.
        Hardware does not bond those loads, even when they are consecutive.
        However, order of the loads need to be checked for correctness.  */
-    if (!load_p || !reg_overlap_mentioned_p (operands[0], operands[1]))
+    if (!load_p || !reg_overlap_mentioned_p (operands[0], operands[3]))
       {
 	output_asm_insn (mips_output_move (insn, operands[0], operands[1]),
 			 operands);
@@ -8139,6 +8139,8 @@ 
       }
     else
       {
+	/* Check the other two registers.  */
+	gcc_assert (!reg_overlap_mentioned_p (operands[2], operands[1]));
 	output_asm_insn (mips_output_move (insn, operands[2], operands[3]),
 			 &operands[2]);
 	output_asm_insn (mips_output_move (insn, operands[0], operands[1]),
@@ -8193,13 +8195,15 @@ 
     /* Reg-renaming pass reuses base register if it is dead after bonded loads.
        Hardware does not bond those loads, even when they are consecutive.
        However, order of the loads need to be checked for correctness.  */
-    if (!reg_overlap_mentioned_p (operands[0], operands[1]))
+    if (!reg_overlap_mentioned_p (operands[0], operands[3]))
       {
 	output_asm_insn ("lh<u>\t%0,%1", operands);
 	output_asm_insn ("lh<u>\t%2,%3", operands);
       }
     else
       {
+	/* Check the other two registers.  */
+	gcc_assert (!reg_overlap_mentioned_p (operands[2], operands[1]));
 	output_asm_insn ("lh<u>\t%2,%3", operands);
 	output_asm_insn ("lh<u>\t%0,%1", operands);
       }