diff mbox series

[13/61] MIPS: Only split shifts if using -mdebugd

Message ID 20250131171232.1018281-15-aleksandar.rakic@htecgroup.com
State New
Headers
Series Improve Mips target |

Commit Message

Aleksandar Rakic Jan. 31, 2025, 5:13 p.m. UTC 
  From: Andrew Bennett <andrew.bennett@imgtec.com>

Enable -mdebugd by default.

Cherry-picked adb95984114b7636ee15f2ba79f94b028c8b35b2
from https://github.com/MIPS/gcc

Signed-off-by: Andrew Bennett <andrew.bennett@imgtec.com>
Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
---
 gcc/config/mips/mips.md  | 1 +
 gcc/config/mips/mips.opt | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index f67fa2e66be..bf8a1217ee9 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -5871,6 +5871,7 @@ 
      be careful not to allocate a new register if we've reached the
      reload pass.  */
   if (TARGET_MIPS16
+      && !TARGET_DEBUG_D_MODE
       && optimize
       && CONST_INT_P (operands[2])
       && INTVAL (operands[2]) > 8
diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt
index 201a9650915..64c3dca4cc2 100644
--- a/gcc/config/mips/mips.opt
+++ b/gcc/config/mips/mips.opt
@@ -131,7 +131,7 @@  mdebug
 Target Var(TARGET_DEBUG_MODE) Undocumented
 
 mdebugd
-Target Var(TARGET_DEBUG_D_MODE) Undocumented
+Target Var(TARGET_DEBUG_D_MODE) Undocumented Init(1)
 
 meb
 Target RejectNegative Mask(BIG_ENDIAN)