From: Andrew Bennett <andrew.bennett@imgtec.com>
GCC can modify a rtx which was created using stack_pointer_rtx.
This means that just doing a straight address comparision of a rtx
against stack_pointer_rtx to see whether it is the stack pointer
register will not be correct in all cases.
This patch rewrites these comparisons to check that firstly the rtx
is a register and its register number is STACK_POINTER_REGNUM.
Cherry-picked 1a066c0af8e7ccf36e8c3f01529c90603a981c18
from https://github.com/MIPS/gcc
Signed-off-by: Andrew Bennett <andrew.bennett@imgtec.com>
Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
---
gcc/config/mips/mips.cc | 16 +++++++++-------
gcc/config/mips/mips.md | 2 +-
2 files changed, 10 insertions(+), 8 deletions(-)
@@ -2804,7 +2804,7 @@ mips_stack_address_p (rtx x, machine_mode mode)
return (mips_classify_address (&addr, x, mode, false)
&& addr.type == ADDRESS_REG
- && addr.reg == stack_pointer_rtx);
+ && REGNO (addr.reg) == STACK_POINTER_REGNUM);
}
/* Return true if ADDR matches the pattern for the LWXS load scaled indexed
@@ -2870,7 +2870,8 @@ mips16_unextended_reference_p (machine_mode mode, rtx base,
if (mode != BLKmode && offset % GET_MODE_SIZE (mode) == 0
&& REGNO (base) != GLOBAL_POINTER_REGNUM)
{
- if (GET_MODE_SIZE (mode) == 4 && base == stack_pointer_rtx)
+ if (GET_MODE_SIZE (mode) == 4 && GET_CODE (base) == REG
+ && REGNO (base) == STACK_POINTER_REGNUM)
return offset < 256U * GET_MODE_SIZE (mode);
return offset < 32U * GET_MODE_SIZE (mode);
}
@@ -9879,7 +9880,7 @@ mips_debugger_offset (rtx addr, HOST_WIDE_INT offset)
if (offset == 0)
offset = INTVAL (offset2);
- if (reg == stack_pointer_rtx
+ if ((GET_CODE (reg) == REG && REGNO (reg) == STACK_POINTER_REGNUM)
|| reg == frame_pointer_rtx
|| reg == hard_frame_pointer_rtx)
{
@@ -10622,7 +10623,7 @@ mips16e_collect_argument_save_p (rtx dest, rtx src, rtx *reg_values,
required_offset = cfun->machine->frame.total_size + argno * UNITS_PER_WORD;
if (base == hard_frame_pointer_rtx)
required_offset -= cfun->machine->frame.hard_frame_pointer_offset;
- else if (base != stack_pointer_rtx)
+ else if (!(GET_CODE (base) == REG && REGNO (base) == STACK_POINTER_REGNUM))
return false;
if (offset != required_offset)
return false;
@@ -10833,7 +10834,7 @@ mips16e_save_restore_pattern_p (rtx pattern, HOST_WIDE_INT adjust,
/* Check that the address is the sum of the stack pointer and a
possibly-zero constant offset. */
mips_split_plus (XEXP (mem, 0), &base, &offset);
- if (base != stack_pointer_rtx)
+ if (!(GET_CODE (base) == REG && REGNO (base) == STACK_POINTER_REGNUM))
return false;
/* Check that SET's other operand is a register. */
@@ -13001,7 +13002,8 @@ mips_restore_reg (rtx reg, rtx mem)
static void
mips_deallocate_stack (rtx base, rtx offset, HOST_WIDE_INT new_frame_size)
{
- if (base == stack_pointer_rtx && offset == const0_rtx)
+ if (GET_CODE (base) == REG && REGNO (base) == STACK_POINTER_REGNUM
+ && offset == const0_rtx)
return;
mips_frame_barrier ();
@@ -18222,7 +18224,7 @@ r10k_simplify_address (rtx x, rtx_insn *insn)
{
/* Replace the incoming value of $sp with
virtual_incoming_args_rtx. */
- if (x == stack_pointer_rtx
+ if (GET_CODE (x) == REG && REGNO (x) == STACK_POINTER_REGNUM
&& DF_REF_BB (def) == ENTRY_BLOCK_PTR_FOR_FN (cfun))
newx = virtual_incoming_args_rtx;
}
@@ -7714,7 +7714,7 @@
[(set (match_operand:SI 1 "register_operand")
(plus:SI (match_dup 1)
(match_operand:SI 2 "const_int_operand")))])]
- "operands[1] == stack_pointer_rtx
+ "GET_CODE (operands[1]) == REG && REGNO (operands[1]) == STACK_POINTER_REGNUM
&& mips16e_save_restore_pattern_p (operands[0], INTVAL (operands[2]), NULL)"
{ return mips16e_output_save_restore (operands[0], INTVAL (operands[2])); }
[(set_attr "type" "arith")