From patchwork Fri Nov 29 03:57:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 102069 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 26BB33858C50 for ; Fri, 29 Nov 2024 04:04:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 26BB33858C50 Authentication-Results: sourceware.org; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=mctlFgFc X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by sourceware.org (Postfix) with ESMTPS id 805133858D38 for ; Fri, 29 Nov 2024 03:59:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 805133858D38 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 805133858D38 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732852771; cv=none; b=nJjKFyjsjRbu/REkV3sNaz1PU5YhhKES0F6NcsDggfsb2n8xM1d6Oet/4JAYnWECW2ZrHy9WEw6XNgWQVfkGV3l1qDyfLro4cwqWuCFQnym4w+ZDf/l11LRIna6awvs8dqnqGe9Vn+prdtK45bLZBvHqp92Mw0CdbGyg0TRSg3A= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732852771; c=relaxed/simple; bh=SqFYcE83WcgqtKqNj+vhGrvyVhlR+5wX+Kbz2C3Jdvg=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=Cy16H3EdhuzTRmWigDy33d5MeLZpLwcpNhjCtR9w4oOtL6yb9Pjbi2gGDpvKjyhZV7W+QMtd8sJstMC17pUCT5EpMAwTlzDNRN+VYjj6uXen+ppeonvSTCpi0o00vjP+4VbXRVfxrdiGF/GCjiqwWhf0JxJ+VwWK+eR0if8KuEU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 805133858D38 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1732852771; x=1764388771; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=SqFYcE83WcgqtKqNj+vhGrvyVhlR+5wX+Kbz2C3Jdvg=; b=mctlFgFc71WLbGB50Mw8RWi2+0llHIlH6MHadijR480r80TWia4ifFAf rhv5DJ3nk9ApONxYtHHVI1yH345vE1pl0fp2FWg7qejBHE3YS/vyE62Fi TFIDPD11XAvvY18QKcD3DLEJsPhE2FxDKrMowKNdriejkpNvLsGRVFfK0 walkqC2C6ogYXZBNxsQrFtEbY3GZZRKCUMZU4yub97y+MGl5sozOtYpo5 DVpHyTT9prOcX1RT4I5/JQcZjJmucT3JSkFWOCYk66qZg17lFI2WUILIJ ZLVRq+/mzuvMjKobNppWGNE35K0JQJNgQvsFkJCHD/QMyvSQjYZk8xoQb Q==; X-CSE-ConnectionGUID: ZV4cicheR1aCR7XR5obwgQ== X-CSE-MsgGUID: sR+NZjBrRjOUcWBSgh1sZQ== X-IronPort-AV: E=McAfee;i="6700,10204,11270"; a="36752283" X-IronPort-AV: E=Sophos;i="6.12,194,1728975600"; d="scan'208";a="36752283" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2024 19:59:30 -0800 X-CSE-ConnectionGUID: qfZP1bIAS5a3VF7Xo1XjHQ== X-CSE-MsgGUID: TfV6wPPqTiqB9ZJ+9UWiHQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,194,1728975600"; d="scan'208";a="92847056" Received: from panli.sh.intel.com ([10.239.154.73]) by fmviesa009.fm.intel.com with ESMTP; 28 Nov 2024 19:59:28 -0800 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v1] RISC-V: Fix incorrect optimization options passing to widden Date: Fri, 29 Nov 2024 11:57:02 +0800 Message-ID: <20241129035702.3965575-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li Like the strided load/store, the testcases of vector widen are designed to pick up different sorts of optimization options but actually these option are ignored according to the Execution log of gcc.log. This patch would like to make it correct almost the same as what we fixed for strided load/store. The below test suites are passed for this patch. * The rv64gcv fully regression test. It is test only patch and obvious up to a point, will commit it directly if no comments in next 48H. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/rvv.exp: Fix the incorrect optimization options passing to testcases. Signed-off-by: Pan Li --- gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp index 448374d49db..26113238c4f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp +++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp @@ -88,7 +88,7 @@ set AUTOVEC_TEST_OPTS [list \ {-ftree-vectorize -O2 -mrvv-max-lmul=m4} ] foreach op $AUTOVEC_TEST_OPTS { dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/widen/*.\[cS\]]] \ - "" "$op" + "$op" "" } # VLS-VLMAX tests