From patchwork Tue Oct 29 08:25:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 99748 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 83DE13858C33 for ; Tue, 29 Oct 2024 08:29:48 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by sourceware.org (Postfix) with ESMTPS id 01C3F3858C51 for ; Tue, 29 Oct 2024 08:27:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 01C3F3858C51 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 01C3F3858C51 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190453; cv=none; b=sodvZinlcjojJmGM2mpSBncR4LI/hBDM0Hn61/GIt0zam53N6/i1RgVOVQEC3cw4DtNMbzofRqeW7Pke+/dTglpJDTyG+DEy+XnOUgNrREuLFbQb0berXHRSmc3PqQ+Vs7cjtC7kvZlcW8c3xG6LDDC2guGmhgW/usrOyFj+FfM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190453; c=relaxed/simple; bh=FxkCLABUypA2GiqvKgoilKJU2drFkC8WhAdhMDnte/Y=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=LkBaJjCwZVGaPElAVc1H1K40uzec23LuTfomUlsH6er4WzjAcD7g2IW85bd+1+X3aMdnduibU47Yu+MCGkXZFGbq1KHhe6I7gk4fEOx1p/PjiId7iXXMGnDq2PfqED2i6nIBo3PO05xz1U06l7c17lZG3C1j1NlswcFd9FG1eq8= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730190444; x=1761726444; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FxkCLABUypA2GiqvKgoilKJU2drFkC8WhAdhMDnte/Y=; b=ePoAZzpyxXyKDBJ0D0/pRumLAc2wz4ZCIOzA/11rwMp/+XfsYs+4b/Me SYRspsold9sPynX7+xZZRdMx/frmEjN9YBvdeoE+1Xm0EgcIEkumrudmM KJruEKdDUhiAxvvJ5tFVxQUa/VU0LWkCRao99A7OuLKfHnM37A/TzQuyY 2WM60HtwLyjlYULRcDUwt3SyJQognO7iY2l5otSu8U7VJDOhusBxD6/uv ZwP0JW/ZlagdRp5ON1SXngOg1jgnsUBQctQaVc9ptA+EUsn1Gs/kVermY l3GDKxud93T+yK1DKr2Yh10j+yBK1OjEh9a7ya8gG3tvzWA2PvLPVx25c A==; X-CSE-ConnectionGUID: 4OLX0wgZTgS5y60Yq9q43A== X-CSE-MsgGUID: cJbdkyVwQl+qQ9o4C1R4eA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="30002106" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="30002106" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2024 01:27:21 -0700 X-CSE-ConnectionGUID: z1pV54BUQLqUcXJAw1KJ3w== X-CSE-MsgGUID: NudhPVMJTPK11ypCBOIc4A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,241,1725346800"; d="scan'208";a="86652644" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa005.jf.intel.com with ESMTP; 29 Oct 2024 01:27:19 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH 4/5] Match: Remove usadd_left_part_1 as it has only one reference [NFC] Date: Tue, 29 Oct 2024 16:25:20 +0800 Message-ID: <20241029082521.3638409-4-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241029082521.3638409-1-pan2.li@intel.com> References: <20241029082521.3638409-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li In previous, we extract matching usadd_left_part_1 to avoid duplication. After we simplify some usadd patterns into cheap form, there will be only one reference to this matching. Thus, remove this matching pattern and unfold it to the reference place. The below test suites are passed for this patch: 1. The rv64gcv fully regression tests. 2. The x86 bootstrap tests. 3. The x86 fully regression tests. gcc/ChangeLog: * match.pd: Remove matching usadd_left_part_1 and unfold it at its reference place Signed-off-by: Pan Li --- gcc/match.pd | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/gcc/match.pd b/gcc/match.pd index 7105aedb40c..a804d9c58fc 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3086,14 +3086,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) || POINTER_TYPE_P (itype)) && wi::eq_p (wi::to_wide (int_cst), wi::max_value (itype)))))) -/* Unsigned Saturation Add */ -/* SAT_ADD = usadd_left_part_1 | usadd_right_part_1, aka: - SAT_ADD = (X + Y) | -((X + Y) < X) */ -(match (usadd_left_part_1 @0 @1) - (plus:c @0 @1) - (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) - && types_match (type, @0, @1)))) - /* SAT_ADD = usadd_left_part_2 | usadd_right_part_2, aka: SAT_ADD = REALPART_EXPR <.ADD_OVERFLOW> | (IMAGPART_EXPR <.ADD_OVERFLOW> != 0) */ (match (usadd_left_part_2 @0 @1) @@ -3101,7 +3093,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) -/* SAT_ADD = usadd_left_part_1 | usadd_right_part_1, aka: +/* SAT_ADD = (X + Y) | usadd_right_part_1, aka: SAT_ADD = (X + Y) | -((type)(X + Y) < X) */ (match (usadd_right_part_1 @0 @1) (negate (convert (lt (plus:c @0 @1) @0))) @@ -3129,7 +3121,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) -/* We cannot merge or overload usadd_left_part_1 and usadd_left_part_2 +/* We cannot merge or overload (X + Y) and usadd_left_part_2 because the sub part of left_part_2 cannot work with right_part_1. For example, left_part_2 pattern focus one .ADD_OVERFLOW but the right_part_1 has nothing to do with .ADD_OVERFLOW. */ @@ -3138,7 +3130,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) SAT_U_ADD = (X + Y) | - ((X + Y) < X) or SAT_U_ADD = (X + Y) | - (X > (X + Y)). */ (match (unsigned_integer_sat_add @0 @1) - (bit_ior:c (usadd_left_part_1 @0 @1) (usadd_right_part_1 @0 @1))) + (bit_ior:c (plus:c @0 @1) (usadd_right_part_1 @0 @1))) /* Unsigned saturation add, case 2 (branchless with .ADD_OVERFLOW): SAT_ADD = REALPART_EXPR <.ADD_OVERFLOW> | -IMAGPART_EXPR <.ADD_OVERFLOW> or