diff mbox series

[05/22] aarch64: Add __builtin_aarch64_chkfeat tests

Message ID	20241023110528.487830-6-yury.khrustalev@arm.com
State	New
Headers	DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 40C1D3858C60 From: Yury Khrustalev <yury.khrustalev@arm.com> To: gcc-patches@gcc.gnu.org Cc: nsz@gcc.gnu.org, richard.earnshaw@arm.com, matthieu.longo@arm.com, richard.ball@arm.com Subject: [PATCH 05/22] aarch64: Add __builtin_aarch64_chkfeat tests Date: Wed, 23 Oct 2024 12:05:11 +0100 Message-Id: <20241023110528.487830-6-yury.khrustalev@arm.com> In-Reply-To: <20241023110528.487830-1-yury.khrustalev@arm.com> References: <20241023110528.487830-1-yury.khrustalev@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org
Series	aarch64: Add support for Guarded Control Stack extension \| [00/22] aarch64: Add support for Guarded Control Stack extension [01/22] aarch64: Add -mbranch-protection=gcs option [02/22] aarch64: Add branch-protection target pragma tests [03/22] aarch64: Add support for chkfeat insn [04/22] aarch64: Add __builtin_aarch64_chkfeat [05/22] aarch64: Add __builtin_aarch64_chkfeat tests [06/22] aarch64: Add GCS instructions [07/22] aarch64: Add GCS builtins [08/22] aarch64: Add __builtin_aarch64_gcs* tests [09/22] aarch64: Add GCS support for nonlocal stack save [10/22] aarch64: Add non-local goto and jump tests for GCS [11/22] aarch64: Add ACLE feature macros for GCS [12/22] aarch64: Add test for GCS ACLE defs [13/22] aarch64: Add target pragma tests for gcs [14/22] aarch64: Add GCS support to the unwinder [15/22] aarch64: Emit GNU property NOTE for GCS [16/22] aarch64: libgcc: add GCS marking to asm [17/22] aarch64: libatomic: add GCS marking to asm [18/22] aarch64: libitm: Add GCS support [19/22] aarch64: Introduce indirect_return attribute [20/22] aarch64: Add tests and docs for indirect_return attribute [21/22] aarch64: Fix tests incompatible with GCS [22/22] aarch64: Fix nonlocal goto tests incompatible with GCS

Commit Message

Yury Khrustalev Oct. 23, 2024, 11:05 a.m. UTC

  From: Szabolcs Nagy <szabolcs.nagy@arm.com>

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/chkfeat-1.c: New test.
	* gcc.target/aarch64/chkfeat-2.c: New test.
---
 gcc/testsuite/gcc.target/aarch64/chkfeat-1.c | 75 ++++++++++++++++++++
 gcc/testsuite/gcc.target/aarch64/chkfeat-2.c | 15 ++++
 2 files changed, 90 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
 create mode 100644 gcc/testsuite/gcc.target/aarch64/chkfeat-2.c

Comments

Richard Sandiford Oct. 24, 2024, 11:15 a.m. UTC | #1

Yury Khrustalev <yury.khrustalev@arm.com> writes:
> From: Szabolcs Nagy <szabolcs.nagy@arm.com>
>
> gcc/testsuite/ChangeLog:
>
> 	* gcc.target/aarch64/chkfeat-1.c: New test.
> 	* gcc.target/aarch64/chkfeat-2.c: New test.
> ---
>  gcc/testsuite/gcc.target/aarch64/chkfeat-1.c | 75 ++++++++++++++++++++
>  gcc/testsuite/gcc.target/aarch64/chkfeat-2.c | 15 ++++
>  2 files changed, 90 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/chkfeat-2.c
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c b/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
> new file mode 100644
> index 00000000000..2fae81e740f
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
> @@ -0,0 +1,75 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mbranch-protection=none" } */
> +/* { dg-final { check-function-bodies "**" "" "" } } */
> +
> +/*
> +**foo1:
> +**	mov	x16, 1
> +**	hint	40 // chkfeat x16
> +**	mov	x0, x16
> +**	ret
> +*/
> +unsigned long long
> +foo1 (void)
> +{
> +  return __builtin_aarch64_chkfeat (1);
> +}
> +
> +/*
> +**foo2:
> +**	mov	x16, 1
> +**	movk	x16, 0x5678, lsl 32
> +**	movk	x16, 0x1234, lsl 48
> +**	hint	40 // chkfeat x16
> +**	mov	x0, x16
> +**	ret
> +*/
> +unsigned long long
> +foo2 (void)
> +{
> +  return __builtin_aarch64_chkfeat (0x1234567800000001);
> +}
> +
> +/*
> +**foo3:
> +**	mov	x16, x0
> +**	hint	40 // chkfeat x16
> +**	mov	x0, x16
> +**	ret
> +*/
> +unsigned long long
> +foo3 (unsigned long long x)
> +{
> +  return __builtin_aarch64_chkfeat (x);
> +}
> +
> +/*
> +**foo4:
> +**	ldr	x16, \[x0\]
> +**	hint	40 // chkfeat x16
> +**	str	x16, \[x0\]
> +**	ret
> +*/
> +void
> +foo4 (unsigned long long *p)
> +{
> +  *p = __builtin_aarch64_chkfeat (*p);
> +}
> +
> +/*
> +**foo5:
> +**	mov	x16, 1
> +**	hint	40 // chkfeat x16
> +**	cmp	x16, 0
> +**(
> +**	csel	w0, w1, w0, eq
> +**|
> +**	csel	w0, w0, w1, ne
> +**)
> +**	ret
> +*/
> +int
> +foo5 (int x, int y)
> +{
> +  return __builtin_aarch64_chkfeat (1) ? x : y;
> +}
> diff --git a/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c b/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c
> new file mode 100644
> index 00000000000..682524e244f
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c
> @@ -0,0 +1,15 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2" } */
> +/* { dg-final { scan-assembler-times {hint\t40 // chkfeat x16} 2 } } */
> +
> +void bar (void);
> +
> +/* Extern call may change enabled HW features.  */
> +unsigned long long
> +foo (void)
> +{
> +  unsigned long long a = __builtin_aarch64_chkfeat (1);
> +  bar ();
> +  unsigned long long b = __builtin_aarch64_chkfeat (1);
> +  return a + b;
> +}

This doesn't in itself check that the chkfeats are correctly ordered
wrt the call.  It might be better to use a check-function-bodies test:

/*
** foo:
**	...
**	hint	40 // chkfeat x16
**	...
**	bl	bar
**	...
**	hint	40 // chkfeat x16
**	...
*/

Looks good otherwise.

Thanks,
Richard

diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c b/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
new file mode 100644
index 00000000000..2fae81e740f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
@@ -0,0 +1,75 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mbranch-protection=none" } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+/*
+**foo1:
+**	mov	x16, 1
+**	hint	40 // chkfeat x16
+**	mov	x0, x16
+**	ret
+*/
+unsigned long long
+foo1 (void)
+{
+  return __builtin_aarch64_chkfeat (1);
+}
+
+/*
+**foo2:
+**	mov	x16, 1
+**	movk	x16, 0x5678, lsl 32
+**	movk	x16, 0x1234, lsl 48
+**	hint	40 // chkfeat x16
+**	mov	x0, x16
+**	ret
+*/
+unsigned long long
+foo2 (void)
+{
+  return __builtin_aarch64_chkfeat (0x1234567800000001);
+}
+
+/*
+**foo3:
+**	mov	x16, x0
+**	hint	40 // chkfeat x16
+**	mov	x0, x16
+**	ret
+*/
+unsigned long long
+foo3 (unsigned long long x)
+{
+  return __builtin_aarch64_chkfeat (x);
+}
+
+/*
+**foo4:
+**	ldr	x16, \[x0\]
+**	hint	40 // chkfeat x16
+**	str	x16, \[x0\]
+**	ret
+*/
+void
+foo4 (unsigned long long *p)
+{
+  *p = __builtin_aarch64_chkfeat (*p);
+}
+
+/*
+**foo5:
+**	mov	x16, 1
+**	hint	40 // chkfeat x16
+**	cmp	x16, 0
+**(
+**	csel	w0, w1, w0, eq
+**|
+**	csel	w0, w0, w1, ne
+**)
+**	ret
+*/
+int
+foo5 (int x, int y)
+{
+  return __builtin_aarch64_chkfeat (1) ? x : y;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c b/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c
new file mode 100644
index 00000000000..682524e244f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c
@@ -0,0 +1,15 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times {hint\t40 // chkfeat x16} 2 } } */
+
+void bar (void);
+
+/* Extern call may change enabled HW features.  */
+unsigned long long
+foo (void)
+{
+  unsigned long long a = __builtin_aarch64_chkfeat (1);
+  bar ();
+  unsigned long long b = __builtin_aarch64_chkfeat (1);
+  return a + b;
+}