From patchwork Wed Oct 23 10:45:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 99394 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 47A1F385843D for ; Wed, 23 Oct 2024 10:47:46 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by sourceware.org (Postfix) with ESMTPS id 5BADE3858D21 for ; Wed, 23 Oct 2024 10:47:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5BADE3858D21 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5BADE3858D21 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1729680427; cv=none; b=TzHEDvtGC7qvxeHycBY5lL68N+uGHvy+6xLhzUH217qDnNtBophMSbG8uDEoQNxeNuwf7Rw0OUjZPQy8ez+MlcVrsw1w9eceYylfOVTDv5P+rjwJ1zJt29YYbkwn7zPPnMQW+YnqWtYkVItTU+Lzs8N0e3xN5LGkiq1pcIBVieo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1729680427; c=relaxed/simple; bh=OCCjC7UA05WmCXLlOXDhaQ+BQ25sOZPpnlro5Mf19ng=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=UVq9WBSd+9Cdg5Sd1FZ3YqmD4wHh0mRp29dGor7Du8vk+mCTIvkiCptvJuF9isvaz0Uf8xclNZ7yXpMSb+6GlKmWfvxoRhswKveXUH/kQOIF3DhyPi7FfyrfitW/CWv3GuLBkiTQ0s+EKB31D8ce2cnLUtOoO4bGqG3FXsTaYYE= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729680424; x=1761216424; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=OCCjC7UA05WmCXLlOXDhaQ+BQ25sOZPpnlro5Mf19ng=; b=fBMV15wadZg8pnHNzbDc2ilXzHUTQ1qgUkyaj3a+XLlZLj+KrPUsnwpC XdcQvqIWwBUzNsmsF/TKaJ0m2+KHWkp6Gy7QWS8sSx3EEvA/xmn36RGuk BgeDvPiCPdGbnhaF5D5oqO7Ji4augk8byFmNtw4Fj+Rapsr6HeXo5QpsP m1PTH6m3PtFjPBPmsxxrsKfPd18GP1D7Fr8TIyTe63WAHAiI7w9rj0El5 2HyQJEZiWb918WmIeL9rtHRY5zVrAmr9kAQtZfeJ/QzXXPAWVrTAnKmzB gQ3H8KAUQI/d65J3mmfoMKxfxisi43R8tzWTfxVWHlfVfdLeqtS0hcmbp A==; X-CSE-ConnectionGUID: rLVoNVAwQCOYsBo5ybxpVQ== X-CSE-MsgGUID: 3qTq5NlBRmecyDIzP37xfg== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="39808696" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="39808696" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2024 03:47:02 -0700 X-CSE-ConnectionGUID: PAT4Y29kRLCs9QJwDpIkQA== X-CSE-MsgGUID: llBKOOkSRAyjCQREyOnVRA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,225,1725346800"; d="scan'208";a="103436942" Received: from panli.sh.intel.com ([10.239.154.73]) by fmviesa002.fm.intel.com with ESMTP; 23 Oct 2024 03:47:00 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH 1/5] Internal-fn: Introduce new IFN MASK_LEN_STRIDED_LOAD{STORE} Date: Wed, 23 Oct 2024 18:45:12 +0800 Message-ID: <20241023104516.2818244-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li This patch would like to introduce new IFN for strided load and store. LOAD: v = MASK_LEN_STRIDED_LOAD (ptr, stride, mask, len, bias) STORE: MASK_LEN_STRIED_STORE (ptr, stride, v, mask, len, bias) The IFN target below code example similar as below void foo (int * a, int * b, int stride, int n) { for (int i = 0; i < n; i++) a[i * stride] = b[i * stride]; } The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * internal-fn.cc (strided_load_direct): Add new define direct for strided load. (strided_store_direct): Ditto but for store. (expand_strided_load_optab_fn): Add new func to expand the IFN MASK_LEN_STRIDED_LOAD in middle-end. (expand_strided_store_optab_fn): Ditto but for store. (direct_strided_load_optab_supported_p): Add define for stride load optab supported. (direct_strided_store_optab_supported_p): Ditto but for store. (internal_fn_len_index): Add strided load/store len index. (internal_fn_mask_index): Ditto but for mask. (internal_fn_stored_value_index): Add strided store value index. * internal-fn.def (MASK_LEN_STRIDED_LOAD): Add new IFN for strided load. (MASK_LEN_STRIDED_STORE): Ditto but for store. * optabs.def (OPTAB_D): Add strided load/store optab. Signed-off-by: Pan Li Co-Authored-By: Juzhe-Zhong --- gcc/internal-fn.cc | 71 +++++++++++++++++++++++++++++++++++++++++++++ gcc/internal-fn.def | 6 ++++ gcc/optabs.def | 2 ++ 3 files changed, 79 insertions(+) diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc index d89a04fe412..bfbbba8e2dd 100644 --- a/gcc/internal-fn.cc +++ b/gcc/internal-fn.cc @@ -159,6 +159,7 @@ init_internal_fns () #define load_lanes_direct { -1, -1, false } #define mask_load_lanes_direct { -1, -1, false } #define gather_load_direct { 3, 1, false } +#define strided_load_direct { -1, -1, false } #define len_load_direct { -1, -1, false } #define mask_len_load_direct { -1, 4, false } #define mask_store_direct { 3, 2, false } @@ -168,6 +169,7 @@ init_internal_fns () #define vec_cond_mask_len_direct { 1, 1, false } #define vec_cond_direct { 2, 0, false } #define scatter_store_direct { 3, 1, false } +#define strided_store_direct { 1, 1, false } #define len_store_direct { 3, 3, false } #define mask_len_store_direct { 4, 5, false } #define vec_set_direct { 3, 3, false } @@ -3712,6 +3714,64 @@ expand_gather_load_optab_fn (internal_fn, gcall *stmt, direct_optab optab) assign_call_lhs (lhs, lhs_rtx, &ops[0]); } +/* Expand MASK_LEN_STRIDED_LOAD call CALL by optab OPTAB. */ + +static void +expand_strided_load_optab_fn (ATTRIBUTE_UNUSED internal_fn, gcall *stmt, + direct_optab optab) +{ + tree lhs = gimple_call_lhs (stmt); + tree base = gimple_call_arg (stmt, 0); + tree stride = gimple_call_arg (stmt, 1); + + rtx lhs_rtx = expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE); + rtx base_rtx = expand_normal (base); + rtx stride_rtx = expand_normal (stride); + + unsigned i = 0; + class expand_operand ops[6]; + machine_mode mode = TYPE_MODE (TREE_TYPE (lhs)); + + create_output_operand (&ops[i++], lhs_rtx, mode); + create_address_operand (&ops[i++], base_rtx); + create_address_operand (&ops[i++], stride_rtx); + + i = add_mask_and_len_args (ops, i, stmt); + expand_insn (direct_optab_handler (optab, mode), i, ops); + + if (!rtx_equal_p (lhs_rtx, ops[0].value)) + emit_move_insn (lhs_rtx, ops[0].value); +} + +/* Expand MASK_LEN_STRIDED_STORE call CALL by optab OPTAB. */ + +static void +expand_strided_store_optab_fn (ATTRIBUTE_UNUSED internal_fn, gcall *stmt, + direct_optab optab) +{ + internal_fn fn = gimple_call_internal_fn (stmt); + int rhs_index = internal_fn_stored_value_index (fn); + + tree base = gimple_call_arg (stmt, 0); + tree stride = gimple_call_arg (stmt, 1); + tree rhs = gimple_call_arg (stmt, rhs_index); + + rtx base_rtx = expand_normal (base); + rtx stride_rtx = expand_normal (stride); + rtx rhs_rtx = expand_normal (rhs); + + unsigned i = 0; + class expand_operand ops[6]; + machine_mode mode = TYPE_MODE (TREE_TYPE (rhs)); + + create_address_operand (&ops[i++], base_rtx); + create_address_operand (&ops[i++], stride_rtx); + create_input_operand (&ops[i++], rhs_rtx, mode); + + i = add_mask_and_len_args (ops, i, stmt); + expand_insn (direct_optab_handler (optab, mode), i, ops); +} + /* Helper for expand_DIVMOD. Return true if the sequence starting with INSN contains any call insns or insns with {,U}{DIV,MOD} rtxes. */ @@ -4101,6 +4161,7 @@ multi_vector_optab_supported_p (convert_optab optab, tree_pair types, #define direct_load_lanes_optab_supported_p multi_vector_optab_supported_p #define direct_mask_load_lanes_optab_supported_p multi_vector_optab_supported_p #define direct_gather_load_optab_supported_p convert_optab_supported_p +#define direct_strided_load_optab_supported_p direct_optab_supported_p #define direct_len_load_optab_supported_p direct_optab_supported_p #define direct_mask_len_load_optab_supported_p convert_optab_supported_p #define direct_mask_store_optab_supported_p convert_optab_supported_p @@ -4109,6 +4170,7 @@ multi_vector_optab_supported_p (convert_optab optab, tree_pair types, #define direct_vec_cond_mask_optab_supported_p convert_optab_supported_p #define direct_vec_cond_optab_supported_p convert_optab_supported_p #define direct_scatter_store_optab_supported_p convert_optab_supported_p +#define direct_strided_store_optab_supported_p direct_optab_supported_p #define direct_len_store_optab_supported_p direct_optab_supported_p #define direct_mask_len_store_optab_supported_p convert_optab_supported_p #define direct_while_optab_supported_p convert_optab_supported_p @@ -4808,6 +4870,8 @@ internal_fn_len_index (internal_fn fn) case IFN_COND_LEN_XOR: case IFN_COND_LEN_SHL: case IFN_COND_LEN_SHR: + case IFN_MASK_LEN_STRIDED_LOAD: + case IFN_MASK_LEN_STRIDED_STORE: return 4; case IFN_COND_LEN_NEG: @@ -4902,6 +4966,10 @@ internal_fn_mask_index (internal_fn fn) case IFN_MASK_LEN_STORE: return 2; + case IFN_MASK_LEN_STRIDED_LOAD: + case IFN_MASK_LEN_STRIDED_STORE: + return 3; + case IFN_MASK_GATHER_LOAD: case IFN_MASK_SCATTER_STORE: case IFN_MASK_LEN_GATHER_LOAD: @@ -4925,6 +4993,9 @@ internal_fn_stored_value_index (internal_fn fn) { switch (fn) { + case IFN_MASK_LEN_STRIDED_STORE: + return 2; + case IFN_MASK_STORE: case IFN_MASK_STORE_LANES: case IFN_SCATTER_STORE: diff --git a/gcc/internal-fn.def b/gcc/internal-fn.def index 23b4ab02b30..2d455938271 100644 --- a/gcc/internal-fn.def +++ b/gcc/internal-fn.def @@ -56,6 +56,7 @@ along with GCC; see the file COPYING3. If not see - mask_load_lanes: currently just vec_mask_load_lanes - mask_len_load_lanes: currently just vec_mask_len_load_lanes - gather_load: used for {mask_,mask_len_,}gather_load + - strided_load: currently just mask_len_strided_load - len_load: currently just len_load - mask_len_load: currently just mask_len_load @@ -64,6 +65,7 @@ along with GCC; see the file COPYING3. If not see - mask_store_lanes: currently just vec_mask_store_lanes - mask_len_store_lanes: currently just vec_mask_len_store_lanes - scatter_store: used for {mask_,mask_len_,}scatter_store + - strided_store: currently just mask_len_strided_store - len_store: currently just len_store - mask_len_store: currently just mask_len_store @@ -212,6 +214,8 @@ DEF_INTERNAL_OPTAB_FN (MASK_GATHER_LOAD, ECF_PURE, mask_gather_load, gather_load) DEF_INTERNAL_OPTAB_FN (MASK_LEN_GATHER_LOAD, ECF_PURE, mask_len_gather_load, gather_load) +DEF_INTERNAL_OPTAB_FN (MASK_LEN_STRIDED_LOAD, ECF_PURE, + mask_len_strided_load, strided_load) DEF_INTERNAL_OPTAB_FN (LEN_LOAD, ECF_PURE, len_load, len_load) DEF_INTERNAL_OPTAB_FN (MASK_LEN_LOAD, ECF_PURE, mask_len_load, mask_len_load) @@ -221,6 +225,8 @@ DEF_INTERNAL_OPTAB_FN (MASK_SCATTER_STORE, 0, mask_scatter_store, scatter_store) DEF_INTERNAL_OPTAB_FN (MASK_LEN_SCATTER_STORE, 0, mask_len_scatter_store, scatter_store) +DEF_INTERNAL_OPTAB_FN (MASK_LEN_STRIDED_STORE, 0, + mask_len_strided_store, strided_store) DEF_INTERNAL_OPTAB_FN (MASK_STORE, 0, maskstore, mask_store) DEF_INTERNAL_OPTAB_FN (STORE_LANES, ECF_CONST, vec_store_lanes, store_lanes) diff --git a/gcc/optabs.def b/gcc/optabs.def index b48e2e5a5ac..90be40f74d5 100644 --- a/gcc/optabs.def +++ b/gcc/optabs.def @@ -548,6 +548,8 @@ OPTAB_DC (vec_series_optab, "vec_series$a", VEC_SERIES) OPTAB_D (vec_shl_insert_optab, "vec_shl_insert_$a") OPTAB_D (len_load_optab, "len_load_$a") OPTAB_D (len_store_optab, "len_store_$a") +OPTAB_D (mask_len_strided_load_optab, "mask_len_strided_load_$a") +OPTAB_D (mask_len_strided_store_optab, "mask_len_strided_store_$a") OPTAB_D (select_vl_optab, "select_vl$a") OPTAB_D (andn_optab, "andn$a3") OPTAB_D (iorn_optab, "iorn$a3")