testsuite: Add RISC-V to targets not xfailing gcc.dg/attr-alloc_size-11.c:50, 51.
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Commit Message
The test has been observed to pass on most architectures including RISC-V:
https://godbolt.org/z/8nYEvW6n1
Origin issue see:
https://gcc.gnu.org/PR79356#c11
Update RISC-V target to to pass list.
gcc/testsuite/ChangeLog:
* gcc.dg/attr-alloc_size-11.c: Add RISC-V to the list
of targets excluding xfail on lines 50 and 51.
---
gcc/testsuite/gcc.dg/attr-alloc_size-11.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Comments
On 8/5/24 6:26 AM, Jiawei wrote:
> The test has been observed to pass on most architectures including RISC-V:
> https://godbolt.org/z/8nYEvW6n1
>
> Origin issue see:
> https://gcc.gnu.org/PR79356#c11
>
> Update RISC-V target to to pass list.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/attr-alloc_size-11.c: Add RISC-V to the list
> of targets excluding xfail on lines 50 and 51.
Almost certainly behaving like the other targets in the list due to how
promotions work.
OK for the trunk. Thanks!
jeff
在 2024/8/5 23:21, Jeff Law 写道:
>
>
> On 8/5/24 6:26 AM, Jiawei wrote:
>> The test has been observed to pass on most architectures including
>> RISC-V:
>> https://godbolt.org/z/8nYEvW6n1
>>
>> Origin issue see:
>> https://gcc.gnu.org/PR79356#c11
>>
>> Update RISC-V target to to pass list.
>>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.dg/attr-alloc_size-11.c: Add RISC-V to the list
>> of targets excluding xfail on lines 50 and 51.
> Almost certainly behaving like the other targets in the list due to
> how promotions work.
>
> OK for the trunk. Thanks!
>
> jeff
Okay, thanks for your review, committed.
BR,
jiawei
@@ -47,8 +47,8 @@ typedef __SIZE_TYPE__ size_t;
/* The following tests fail because of missing range information. The xfail
exclusions are PR79356. */
-TEST (signed char, SCHAR_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for signed char" { xfail { ! { aarch64*-*-* arm*-*-* avr-*-* alpha*-*-* cris-*-* ia64-*-* mips*-*-* or1k*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390*-*-* visium-*-* msp430-*-* nvptx*-*-*} } } } */
-TEST (short, SHRT_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for short" { xfail { ! { aarch64*-*-* arm*-*-* alpha*-*-* avr-*-* cris-*-* ia64-*-* mips*-*-* or1k*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390x-*-* visium-*-* msp430-*-* nvptx*-*-* } } } } */
+TEST (signed char, SCHAR_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for signed char" { xfail { ! { aarch64*-*-* arm*-*-* avr-*-* alpha*-*-* cris-*-* ia64-*-* mips*-*-* or1k*-*-* pdp11*-*-* powerpc*-*-* riscv*-*-* sparc*-*-* s390*-*-* visium-*-* msp430-*-* nvptx*-*-*} } } } */
+TEST (short, SHRT_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for short" { xfail { ! { aarch64*-*-* arm*-*-* alpha*-*-* avr-*-* cris-*-* ia64-*-* mips*-*-* or1k*-*-* pdp11*-*-* powerpc*-*-* riscv*-*-* sparc*-*-* s390x-*-* visium-*-* msp430-*-* nvptx*-*-* } } } } */
TEST (int, INT_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" } */
TEST (int, -3, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" } */
TEST (int, -2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" } */