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Date: Fri, 2 Aug 2024 23:32:20 +0800 Message-Id: <20240802153220.3861120-1-jiawei@iscas.ac.cn> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CM-TRANSID: zQCowAAnDzop_KxmkBr9Ag--.42945S2 X-Coremail-Antispam: 1UD129KBjvJXoWxGw1fAryxWryxtw17Jr18Xwb_yoW5ZFy5pa 1rG3yYk34FqF93Ww4xKFyUXw45uFnYgry5uwn7uw1UA39rJrWDZF1kKw13Gr15XF45Gr1S kF129ryYvw1jg37anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkG14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AKxVW0oV Cq3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0 I7IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r 4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY1x0262kKe7AKxVWU AVWUtwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14 v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkG c2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4U MIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUBVbkUUU UU= X-Originating-IP: [112.74.111.65] X-CM-SenderInfo: 5mld4v3l6l2u1dvotugofq/1tbiBwwRAGas7ncesQAAsm X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org https://github.com/riscv/riscv-isa-manual/blob/main/src/zimop.adoc gcc/ChangeLog: * common/config/riscv/riscv-common.cc: New extension. * config/riscv/riscv.opt: New mask. gcc/testsuite/ChangeLog: * gcc.target/riscv/arch-42.c: New test. * gcc.target/riscv/arch-43.c: New test. --- gcc/common/config/riscv/riscv-common.cc | 8 ++++++++ gcc/config/riscv/riscv.opt | 7 +++++++ gcc/testsuite/gcc.target/riscv/arch-42.c | 5 +++++ gcc/testsuite/gcc.target/riscv/arch-43.c | 5 +++++ 4 files changed, 25 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/arch-42.c create mode 100644 gcc/testsuite/gcc.target/riscv/arch-43.c diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index 1944c7785c4..62c6e1dab1f 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -97,6 +97,8 @@ static const riscv_implied_info_t riscv_implied_info[] = {"zabha", "zaamo"}, {"zacas", "zaamo"}, + {"zcmop", "zca"}, + {"b", "zba"}, {"b", "zbb"}, {"b", "zbs"}, @@ -319,6 +321,9 @@ static const struct riscv_ext_version riscv_ext_version_table[] = {"zicclsm", ISA_SPEC_CLASS_NONE, 1, 0}, {"ziccrse", ISA_SPEC_CLASS_NONE, 1, 0}, + {"zimop", ISA_SPEC_CLASS_NONE, 1, 0}, + {"zcmop", ISA_SPEC_CLASS_NONE, 1, 0}, + {"zicntr", ISA_SPEC_CLASS_NONE, 2, 0}, {"zihpm", ISA_SPEC_CLASS_NONE, 2, 0}, @@ -1629,6 +1634,9 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] = {"zicbop", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOP}, {"zic64b", &gcc_options::x_riscv_zicmo_subext, MASK_ZIC64B}, + {"zimop", &gcc_options::x_riscv_mop_subext, MASK_ZIMOP}, + {"zcmop", &gcc_options::x_riscv_mop_subext, MASK_ZCMOP}, + {"zve32x", &gcc_options::x_target_flags, MASK_VECTOR}, {"zve32f", &gcc_options::x_target_flags, MASK_VECTOR}, {"zve64x", &gcc_options::x_target_flags, MASK_VECTOR}, diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt index 2e340e5324f..a8758abc918 100644 --- a/gcc/config/riscv/riscv.opt +++ b/gcc/config/riscv/riscv.opt @@ -406,6 +406,13 @@ Mask(ZICBOP) Var(riscv_zicmo_subext) Mask(ZIC64B) Var(riscv_zicmo_subext) +TargetVariable +int riscv_mop_subext + +Mask(ZIMOP) Var(riscv_mop_subext) + +Mask(ZCMOP) Var(riscv_mop_subext) + TargetVariable int riscv_zf_subext diff --git a/gcc/testsuite/gcc.target/riscv/arch-42.c b/gcc/testsuite/gcc.target/riscv/arch-42.c new file mode 100644 index 00000000000..83f78d28dbe --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/arch-42.c @@ -0,0 +1,5 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zimop -mabi=lp64" } */ +int foo() +{ +} diff --git a/gcc/testsuite/gcc.target/riscv/arch-43.c b/gcc/testsuite/gcc.target/riscv/arch-43.c new file mode 100644 index 00000000000..4a300a165fd --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/arch-43.c @@ -0,0 +1,5 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zcmop -mabi=lp64" } */ +int foo() +{ +}