From patchwork Fri Apr 12 10:52:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 88411 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 105B3385842A for ; Fri, 12 Apr 2024 10:53:17 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) by sourceware.org (Postfix) with ESMTPS id 1000A3858D38 for ; Fri, 12 Apr 2024 10:52:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1000A3858D38 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 1000A3858D38 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1712919171; cv=none; b=EZV6kOjjyVT7FXaTqo/STjijPuqauYtVNBJNc01YJZvTZRUCeVEePPXXoM7FU+g3mCk2Y0mcRWcCegPSEGIYqEJBziF0tZBfbjK2Lshm6RrAXitGqBeVOJy4EBUjM9x3YEdii8FA0QJWUp37WHj5vOQ4UzFuhRM45csrst7Jlq4= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1712919171; c=relaxed/simple; bh=gVY6bcQewPPFUdakKg7H5cXIT+n6+llJYQW1svVGvVs=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=Rkc5GhJvV+zPzZwkmEjoWYFZkTsPdmVXdJ1qHwKwHriNErfKkvBY8jRo93hFtOTFuE2HfRd4d93FVY5R62yh4O4ci5KJAGUSO46Eg5fwdz8jYihGqBcVh5FgTaIBcF4ZbCNQN6D6fxp3khBA+AZek/5RFdS69oT+ivKdLOF4F4U= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712919169; x=1744455169; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=gVY6bcQewPPFUdakKg7H5cXIT+n6+llJYQW1svVGvVs=; b=iaYx3jv40sOaGqfFvCznExWAwm3b/PzNq1LSQ+7s3qtLLARdnXpn3kRC mTnzu4yaKKETY40mc0tUbeEr4Sn/mqeN/npvcgTuB6H7piPRi3TA8L/G/ ild4KtOuPnCsbliBM1phSDelPkLlsPGVtv1imzzg3f6b8AooMDArjOdZN 9aQ07nfI0RKGhksFf2qXju5MOxjQBzTHS4HzP+sexjskQSFlLhgoiMwjt qmCjyGAkU7dUczeTxOgJFMbIBTW0MilPRd9wX964r9Wh0KsHH7kqXOHKh F1B5Gdd9tpdV3gpkG3gEjEE2PiEjCAaflJQBYYqTtJWHsnnkrLFRWqkMU w==; X-CSE-ConnectionGUID: KuDMDYdCQ3CztBhon2glsA== X-CSE-MsgGUID: wpiwkz5FSn6tZ1A/Li3NiA== X-IronPort-AV: E=McAfee;i="6600,9927,11041"; a="8242604" X-IronPort-AV: E=Sophos;i="6.07,195,1708416000"; d="scan'208";a="8242604" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Apr 2024 03:52:48 -0700 X-CSE-ConnectionGUID: tGZTIY5ARsy4gh1GEMFedw== X-CSE-MsgGUID: Ol7xaQeHT8K91iYy15CTXg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,195,1708416000"; d="scan'208";a="21184029" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmviesa010.fm.intel.com with ESMTP; 12 Apr 2024 03:52:45 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail03.sh.intel.com (Postfix) with ESMTP id BA2C910077CA; Fri, 12 Apr 2024 18:52:44 +0800 (CST) From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, Pan Li Subject: [committed] RISC-V: Fix Werror=sign-compare in riscv_validate_vector_type Date: Fri, 12 Apr 2024 18:52:43 +0800 Message-Id: <20240412105243.2303706-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org From: Pan Li This patch would like to fix the Werror=sign-compare similar to below: gcc/config/riscv/riscv.cc: In function ‘void riscv_validate_vector_type(const_tree, const char*)’: gcc/config/riscv/riscv.cc:5614:23: error: comparison of integer expressions of different signedness: ‘int’ and ‘unsigned int’ [-Werror=sign-compare] 5614 | if (TARGET_MIN_VLEN < required_min_vlen) The TARGET_MIN_VLEN is *int* by default but the required_min_vlen returned from riscv_vector_required_min_vlen is **unsigned**. Thus, adjust the related function and reference variable(s) to int type to avoid such kind of Werror. The below test suite is passed for this patch. * The rv64gcv fully regression tests. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_vector_float_type_p): Take int as the return value instead of unsigned. (riscv_vector_element_bitsize): Ditto. (riscv_vector_required_min_vlen): Ditto. (riscv_validate_vector_type): Take int type for local variable(s). Signed-off-by: Pan Li --- gcc/config/riscv/riscv.cc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index e5f00806bb9..74445bc977c 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -5499,7 +5499,7 @@ riscv_vector_float_type_p (const_tree type) return strstr (name, "vfloat") != NULL; } -static unsigned +static int riscv_vector_element_bitsize (const_tree type) { machine_mode mode = TYPE_MODE (type); @@ -5523,7 +5523,7 @@ riscv_vector_element_bitsize (const_tree type) gcc_unreachable (); } -static unsigned +static int riscv_vector_required_min_vlen (const_tree type) { machine_mode mode = TYPE_MODE (type); @@ -5531,7 +5531,7 @@ riscv_vector_required_min_vlen (const_tree type) if (riscv_v_ext_mode_p (mode)) return TARGET_MIN_VLEN; - unsigned element_bitsize = riscv_vector_element_bitsize (type); + int element_bitsize = riscv_vector_element_bitsize (type); const char *name = IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (type))); if (strstr (name, "bool64") != NULL) @@ -5569,7 +5569,7 @@ riscv_validate_vector_type (const_tree type, const char *hint) return; } - unsigned element_bitsize = riscv_vector_element_bitsize (type); + int element_bitsize = riscv_vector_element_bitsize (type); bool int_type_p = riscv_vector_int_type_p (type); if (int_type_p && element_bitsize == 64 @@ -5609,7 +5609,7 @@ riscv_validate_vector_type (const_tree type, const char *hint) return; } - unsigned required_min_vlen = riscv_vector_required_min_vlen (type); + int required_min_vlen = riscv_vector_required_min_vlen (type); if (TARGET_MIN_VLEN < required_min_vlen) {