diff mbox series

[2/2] LoongArch: Remove unneeded sign extension after crc/crcc instructions

Message ID 20240226042830.6927-2-xry111@xry111.site
State Committed
Commit aab1c5dcd23f014f39b127f74aecd04913945a7f
Headers
Series [1/2] LoongArch: NFC: Deduplicate crc instruction defines |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gcc_build--master-arm success Testing passed
linaro-tcwg-bot/tcwg_gcc_build--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_gcc_check--master-aarch64 pending Patch applied
linaro-tcwg-bot/tcwg_gcc_check--master-arm success Testing passed

Commit Message

Xi Ruoyao Feb. 26, 2024, 4:28 a.m. UTC 
  The specification of crc/crcc instructions is clear that the output is
sign-extended to GRLEN.  Add a define_insn to tell the compiler this
fact and allow it to remove the unneeded sign extension on crc/crcc
output.  As crc/crcc instructions are usually used in a tight loop,
this should produce a significant performance gain.

gcc/ChangeLog:

	* config/loongarch/loongarch.md
	(loongarch_<crc>_w_<size>_w_extended): New define_insn.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/crc-sext.c: New test;
---

Bootstrapped and regtested on loongarch64-linux-gnu.  Ok for trunk?

 gcc/config/loongarch/loongarch.md             | 11 +++++++++++
 gcc/testsuite/gcc.target/loongarch/crc-sext.c | 13 +++++++++++++
 2 files changed, 24 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/crc-sext.c
diff mbox series

Patch

diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
index 4ded1b3a117..525e1e82183 100644
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -4264,6 +4264,17 @@  (define_insn "loongarch_<crc>_w_<size>_w"
   [(set_attr "type" "unknown")
    (set_attr "mode" "<MODE>")])
 
+(define_insn "loongarch_<crc>_w_<size>_w_extended"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+	(sign_extend:DI
+	  (unspec:SI [(match_operand:QHSD 1 "register_operand" "r")
+		      (match_operand:SI 2 "register_operand" "r")]
+		     CRC)))]
+  "TARGET_64BIT"
+  "<crc>.w.<size>.w\t%0,%1,%2"
+  [(set_attr "type" "unknown")
+   (set_attr "mode" "<MODE>")])
+
 ;; With normal or medium code models, if the only use of a pc-relative
 ;; address is for loading or storing a value, then relying on linker
 ;; relaxation is not better than emitting the machine instruction directly.
diff --git a/gcc/testsuite/gcc.target/loongarch/crc-sext.c b/gcc/testsuite/gcc.target/loongarch/crc-sext.c
new file mode 100644
index 00000000000..9ade5a8e4ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/crc-sext.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=loongarch64" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+**my_crc:
+**	crc.w.d.w	\$r4,\$r4,\$r5
+**	jr	\$r1
+*/
+int my_crc(long long dword, int crc)
+{
+	return __builtin_loongarch_crc_w_d_w(dword, crc);
+}