From patchwork Fri Jan 19 10:39:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: YunQiang Su X-Patchwork-Id: 84417 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D2310385841C for ; Fri, 19 Jan 2024 10:40:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D2310385841C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1705660844; bh=+4s8wRBiz2fCk2W/e6z8lTxIPkakDMLko9TfrczSM5U=; h=From:To:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=Gw+yVJVq7KbZ7AWvcmHFmXYlLzZU2aIQvZ5B7fwmpMgVrUQ9yqb3UZ48uRjqvStin mO66u9BQy6Vs9ETMrE4Z27LHp95U4dPG4fRxOL1zBhA6sXt7F6ULOq6FrMIkPWDicQ LZ3o2pxO5a3AQDaF6STNidE5iZaAYBor/mdStl5Y= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pf1-f177.google.com (mail-pf1-f177.google.com [209.85.210.177]) by sourceware.org (Postfix) with ESMTPS id 7CCDB3858C30 for ; Fri, 19 Jan 2024 10:39:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7CCDB3858C30 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 7CCDB3858C30 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=209.85.210.177 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705660781; cv=none; b=UM4y5ZDQAZeb9U2pfUU2KFlYOC9x2EkUSaUWB8lxTlouQ5MVwG+lAYVU5gPX9azxGQXq8LI7qpo8KhwhCV8tgU5ksd8h4QQMO6O/8cWdsRrFtyQUqeRdmNYFiEjtPFT3YubyD/xeH2CIVRIwTMJyK0BKrr16AXfXXLoAuTPkBTM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705660781; c=relaxed/simple; bh=t68y/Wtkaw3RNZ6pJtxeMGjSFc4HN/VNDlsnPlw6pEc=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=eR12BXSSfvtVZyqmHI+rfQ1Y7viByLO03ernN9/2Lt29KO13qNEy31OcQrTd14YSLhz0fDbAts6B89JaZY8eQPDcLjrwlQN4g7Vcq+2168VMrah7bIKFwu5xhVF6emZ6sDewwUs/rzoZaS5Eq8rYgHOTAISqIPIZbvms67Mgfdg= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pf1-f177.google.com with SMTP id d2e1a72fcca58-6dbb003be79so1003035b3a.0 for ; Fri, 19 Jan 2024 02:39:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705660775; x=1706265575; h=content-transfer-encoding:mime-version:message-id:date:subject:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=+4s8wRBiz2fCk2W/e6z8lTxIPkakDMLko9TfrczSM5U=; b=w9uE4/dbOOD+zuX0/lcZhAW8A7Xo49bySLchi3jnHgZoqol6IEV99dTAXhMvX0d6YB XVh9wL+ULfUkZ0Npz222X7mMR2oUCA08tfbDlEu8lrSN0jfsfUdwk2gi9xNQ6i94In4Q LPxreHAeYmLdyAeR45VSeKmICoF9+MShyCdQ/B/HnRHxTksl0Jh0570h/gm3OxfmBNqR qeb8YzzINRsF4LkihhbHEE5fg+5ZRXfXLi+FzcEo05+aBnLWBHj5OPETZ5L025wj+d/F PEXQz7wLLpBc0vA8MlGf3lOWFUIwsZapd4g2SXp1wc7bEctNaO7pBFx8/7tdTE5IvtKe NDNA== X-Gm-Message-State: AOJu0Yww67/8NXWW6BUHuO3HUFhtYvIR+YWH1hLfMVZ3Su65tjnOjJyb /TVcX6jtyN6pPyilzDUVThmmMQLfu7ztq3Rkl1t1Sidi98BwOX157m+93sEy X-Google-Smtp-Source: AGHT+IE5ud0AZAzZuDONNoJPii1mK+0TLm4loDf5JWPiPMHjuqCtcAsxvsbnWVt4BUIyl1g6/tfOVg== X-Received: by 2002:a05:6a20:b709:b0:19b:1191:50a6 with SMTP id fg9-20020a056a20b70900b0019b119150a6mr884974pzb.53.1705660774454; Fri, 19 Jan 2024 02:39:34 -0800 (PST) Received: from localhost.localdomain ([149.248.38.156]) by smtp.gmail.com with ESMTPSA id u30-20020a63471e000000b0059b2316be86sm3019749pga.46.2024.01.19.02.39.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jan 2024 02:39:34 -0800 (PST) From: YunQiang Su To: gcc-patches@gcc.gnu.org Subject: [PATCH] MIPS: Accept arguments for -mexplicit-relocs Date: Fri, 19 Jan 2024 18:39:19 +0800 Message-Id: <20240119103919.3111807-1-syq@gcc.gnu.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org GAS introduced explicit relocs since 2001, and %pcrel_hi/low were introduced in 2014. In future, we may introduce more. Let's convert -mexplicit-relocs option, and accpet options: none, base, pcrel. We also update gcc/configure.ac to set the value to option the gas support when GCC itself is built. gcc * configure.ac: Detect the explicit relocs support for mips, and define C macro MIPS_EXPLICIT_RELOCS. * config.in: Regenerated. * configure: Regenerated. * doc/invoke.texi(MIPS Options): Add -mexplicit-relocs. * config/mips/mips-opts.h: Define enum mips_explicit_relocs. * config/mips/mips.cc(mips_set_compression_mode): Sorry if !TARGET_EXPLICIT_RELOCS instead of just set it. * config/mips/mips.h: Define TARGET_EXPLICIT_RELOCS and TARGET_EXPLICIT_RELOCS_PCREL with mips_opt_explicit_relocs. * config/mips/mips.opt: Introduce -mexplicit-relocs= option and define -m(no-)explicit-relocs as aliases. --- gcc/config.in | 6 +++++ gcc/config/mips/mips-opts.h | 7 +++++ gcc/config/mips/mips.cc | 5 ++-- gcc/config/mips/mips.h | 8 ++++++ gcc/config/mips/mips.opt | 25 ++++++++++++++++-- gcc/configure | 51 ++++++++++++++++++++++++++++++++----- gcc/configure.ac | 21 +++++++++++---- gcc/doc/invoke.texi | 16 ++++++++++++ 8 files changed, 124 insertions(+), 15 deletions(-) diff --git a/gcc/config.in b/gcc/config.in index 99fd2d89fe3..ce1d073833f 100644 --- a/gcc/config.in +++ b/gcc/config.in @@ -2356,6 +2356,12 @@ #endif +/* Define if assembler supports %reloc. */ +#ifndef USED_FOR_TARGET +#undef MIPS_EXPLICIT_RELOCS +#endif + + /* Define if host mkdir takes a single argument. */ #ifndef USED_FOR_TARGET #undef MKDIR_TAKES_ONE_ARG diff --git a/gcc/config/mips/mips-opts.h b/gcc/config/mips/mips-opts.h index 57bdbdfa721..4b0c2c09a3d 100644 --- a/gcc/config/mips/mips-opts.h +++ b/gcc/config/mips/mips-opts.h @@ -53,4 +53,11 @@ enum mips_cb_setting { MIPS_CB_OPTIMAL, MIPS_CB_ALWAYS }; + +/* Enumerates the setting of the -mexplicit-relocs= option. */ +enum mips_explicit_relocs { + MIPS_EXPLICIT_RELOCS_NONE, + MIPS_EXPLICIT_RELOCS_BASE, + MIPS_EXPLICIT_RELOCS_PCREL +}; #endif diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc index 30e99811ff6..68e2ae8d8fa 100644 --- a/gcc/config/mips/mips.cc +++ b/gcc/config/mips/mips.cc @@ -20033,8 +20033,6 @@ mips_set_compression_mode (unsigned int compression_mode) call. */ flag_move_loop_invariants = 0; - target_flags |= MASK_EXPLICIT_RELOCS; - /* Experiments suggest we get the best overall section-anchor results from using the range of an unextended LW or SW. Code that makes heavy use of byte or short accesses can do better @@ -20064,6 +20062,9 @@ mips_set_compression_mode (unsigned int compression_mode) if (TARGET_MSA) sorry ("MSA MIPS16 code"); + + if (!TARGET_EXPLICIT_RELOCS) + sorry ("MIPS16 requires %<-mexplicit-relocs%>"); } else { diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 8768933ba37..7145d23c650 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -145,6 +145,14 @@ struct mips_cpu_info { || TARGET_MICROMIPS) \ && mips_cb != MIPS_CB_NEVER) +/* True if assembler support %gp_rel etc. */ +#define TARGET_EXPLICIT_RELOCS \ + (mips_opt_explicit_relocs >= MIPS_EXPLICIT_RELOCS_BASE) + +/* True if assembler support %pcrel_hi/%pcrel_lo. */ +#define TARGET_EXPLICIT_RELOCS_PCREL \ + (mips_opt_explicit_relocs >= MIPS_EXPLICIT_RELOCS_PCREL) + /* True if the output file is marked as ".abicalls; .option pic0" (-call_nonpic). */ #define TARGET_ABICALLS_PIC0 \ diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index e8b411a8ffe..ce36942aabe 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -145,9 +145,30 @@ meva Target Var(TARGET_EVA) Use Enhanced Virtual Addressing instructions. +Enum +Name(mips_explicit_relocs) Type(int) +The code model option names for -mexplicit-relocs: + +EnumValue +Enum(mips_explicit_relocs) String(none) Value(MIPS_EXPLICIT_RELOCS_NONE) + +EnumValue +Enum(mips_explicit_relocs) String(base) Value(MIPS_EXPLICIT_RELOCS_BASE) + +EnumValue +Enum(mips_explicit_relocs) String(pcrel) Value(MIPS_EXPLICIT_RELOCS_PCREL) + +mexplicit-relocs= +Target RejectNegative Joined Enum(mips_explicit_relocs) Var(mips_opt_explicit_relocs) Init(MIPS_EXPLICIT_RELOCS) +Use %reloc() assembly operators. + mexplicit-relocs -Target Mask(EXPLICIT_RELOCS) -Use NewABI-style %reloc() assembly operators. +Target RejectNegative Alias(mexplicit-relocs=,base) +Use %reloc() assembly operators (for backward compatibility). + +mno-explicit-relocs +Target RejectNegative Alias(mexplicit-relocs=,none) +Don't use %reloc() assembly operators (for backward compatibility). mextern-sdata Target Var(TARGET_EXTERN_SDATA) Init(1) diff --git a/gcc/configure b/gcc/configure index 4acb254d830..578c72da70a 100755 --- a/gcc/configure +++ b/gcc/configure @@ -30351,8 +30351,41 @@ fi ;; mips*-*-*) - { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for explicit relocation support" >&5 -$as_echo_n "checking assembler for explicit relocation support... " >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for explicit relocation support: %pcrel_hi/%pcrel_lo" >&5 +$as_echo_n "checking assembler for explicit relocation support: %pcrel_hi/%pcrel_lo... " >&6; } +if ${gcc_cv_as_mips_explicit_relocs_pcrel+:} false; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_mips_explicit_relocs_pcrel=no + if test x$gcc_cv_as != x; then + $as_echo ' lui $4,%pcrel_hi(foo)' > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_mips_explicit_relocs_pcrel=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_mips_explicit_relocs_pcrel" >&5 +$as_echo "$gcc_cv_as_mips_explicit_relocs_pcrel" >&6; } +if test $gcc_cv_as_mips_explicit_relocs_pcrel = yes; then + +$as_echo "#define MIPS_EXPLICIT_RELOCS MIPS_EXPLICIT_RELOCS_PCREL" >>confdefs.h + +fi + + + if test x$gcc_cv_as_mips_explicit_relocs_pcrel = xno; then \ + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for explicit relocation support: %gp_rel" >&5 +$as_echo_n "checking assembler for explicit relocation support: %gp_rel... " >&6; } if ${gcc_cv_as_mips_explicit_relocs+:} false; then : $as_echo_n "(cached) " >&6 else @@ -30377,12 +30410,18 @@ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_mips_explicit_relocs" >&5 $as_echo "$gcc_cv_as_mips_explicit_relocs" >&6; } if test $gcc_cv_as_mips_explicit_relocs = yes; then - if test x$target_cpu_default = x - then target_cpu_default=MASK_EXPLICIT_RELOCS - else target_cpu_default="($target_cpu_default)|MASK_EXPLICIT_RELOCS" - fi + +$as_echo "#define MIPS_EXPLICIT_RELOCS MIPS_EXPLICIT_RELOCS_BASE" >>confdefs.h + fi + fi + + if test x$gcc_cv_as_mips_explicit = xno; then \ + +$as_echo "#define MIPS_EXPLICIT_RELOCS MIPS_EXPLICIT_RELOCS_NONE" >>confdefs.h + + fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for -mno-shared support" >&5 $as_echo_n "checking assembler for -mno-shared support... " >&6; } diff --git a/gcc/configure.ac b/gcc/configure.ac index d2ed14496c1..5cc9338bec4 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -5241,13 +5241,24 @@ LCF0: ;; mips*-*-*) - gcc_GAS_CHECK_FEATURE([explicit relocation support], + gcc_GAS_CHECK_FEATURE([explicit relocation support: %pcrel_hi/%pcrel_lo], + gcc_cv_as_mips_explicit_relocs_pcrel,, +[ lui $4,%pcrel_hi(foo)],, + [AC_DEFINE(MIPS_EXPLICIT_RELOCS, MIPS_EXPLICIT_RELOCS_PCREL, + [Define if assembler supports %pcrel_hi/%pcrel_lo.])]) + + if test x$gcc_cv_as_mips_explicit_relocs_pcrel = xno; then \ + gcc_GAS_CHECK_FEATURE([explicit relocation support: %gp_rel], gcc_cv_as_mips_explicit_relocs,, [ lw $4,%gp_rel(foo)($4)],, - [if test x$target_cpu_default = x - then target_cpu_default=MASK_EXPLICIT_RELOCS - else target_cpu_default="($target_cpu_default)|MASK_EXPLICIT_RELOCS" - fi]) + [AC_DEFINE(MIPS_EXPLICIT_RELOCS, MIPS_EXPLICIT_RELOCS_BASE, + [Define if assembler supports %reloc.])]) + fi + + if test x$gcc_cv_as_mips_explicit = xno; then \ + AC_DEFINE(MIPS_EXPLICIT_RELOCS, MIPS_EXPLICIT_RELOCS_NONE, + [Define if assembler supports %reloc.]) + fi gcc_GAS_CHECK_FEATURE([-mno-shared support], gcc_cv_as_mips_no_shared,[-mno-shared], [nop],, diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 43fd3c3a3cd..c4a22752c1c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1137,6 +1137,7 @@ Objective-C and Objective-C++ Dialects}. -mcode-readable=@var{setting} -msplit-addresses -mno-split-addresses -mexplicit-relocs -mno-explicit-relocs +-mexplicit-relocs=@var{release} -mcheck-zero-division -mno-check-zero-division -mdivide-traps -mdivide-breaks -mload-store-pairs -mno-load-store-pairs @@ -28693,6 +28694,21 @@ branch to be used if one is available in the current ISA and the delay slot is successfully filled. If the delay slot is not filled, a compact branch will be chosen if one is available. +@opindex mexplicit-relocs=none +@opindex mexplicit-relocs=base +@opindex mexplicit-relocs=pcrel +@item -mexplicit-relocs=none +@itemx -mexplicit-relocs=base +@itemx -mexplicit-relocs=pcrel +@itemx -mexplicit-relocs +@itemx -mno-explicit-relocs +These options control whether explicit relocs (such as %gp_rel) are used. +The default value depends on the version of GAS when GCC itself was built. + +The @code{base} explicit-relocs support introdunced into GAS in 2001. +The @code{pcrel} explicit-relocs support introdunced into GAS in 2014, +which supports @code{%pcrel_hi} and @code{%pcrel_lo}. + @opindex mfp-exceptions @item -mfp-exceptions @itemx -mno-fp-exceptions