From patchwork Thu Jan 18 01:08:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 84310 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 558353858C2A for ; Thu, 18 Jan 2024 01:09:01 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbg153.qq.com (smtpbg153.qq.com [13.245.218.24]) by sourceware.org (Postfix) with ESMTPS id 0E10A3858C56 for ; Thu, 18 Jan 2024 01:08:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0E10A3858C56 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 0E10A3858C56 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=13.245.218.24 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705540110; cv=none; b=n+CYh2wCZUTwaeKJqL0VQ917ClKogTUVcdFHiWefY38TnaYD22OLtTvJ0zSOh09j79Mj+8NtIYGnCGvaQoK3RdhDIFe8AsiP3xkUTcL15TWTnddWKmfdMlrzFtiSQidO1Mj5rxOUd8e6ksyhY+TlwIhYe9qmj2LLbTSNeTkvKRw= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705540110; c=relaxed/simple; bh=9SfUXKKWCGkY3I1G224HJYJpVEDrjxl0Tuw73TmoIAk=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=bReLnkqx6lvLsJXGJ+9i4bmlTsm/q0i80N9CzJs28ivRwh/2Qzy1CBGJTpH+EegVBCSA/uQr1R/PLkxvaBA1tM+5SlMUAJmeU2O6v6Y5R1iHXDUerqZwOx1cpTg2btGs8pfyzShZZqebZylRhaO7zEZ7UzCHslnPbd/nSVNC+4c= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp85t1705540097to86bgjy X-QQ-Originating-IP: JppGBufWbGzo00sR6Ij8dEpjwSh25n+As5ewav373RY= Received: from rios-cad121.hadoop.rioslab.org ( [58.60.1.9]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 18 Jan 2024 09:08:16 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-FEAT: +ynUkgUhZJn90g5c68u3H4FsOuxQcZApUac6R5Dxh9ro7pt3KXGFA7kIS8Qr1 yq3MyGqTaLuoe0PknbLYdVi5qn4bZpx6Wk6RSMqFuge8kYaBwhJmcxqnM04BDjzOTkDWg/d QGphhzE2+GjBHzY60NHc7Hy5LRED4lHnkPKq31fXNtLicHAVs2aJckqHtG/NjZmDCjCcYuR lmDl5jCTaZAVY/4llHzcxyi8V/Q0nhdY7kRcwDXNYISb+ktPtMyqafRwNYUBUfV0BZUbUln Hkst5WwmYkiamasYgHPKx5EZhoEJW5WkvfIVSFCyVC/1RnSj5u0iWCy9Bzm4lXp9M/rxAWk lcIg8eK8yDwXgBUkqTmiBCYLX4rtY4hb91E9RYcHCcutDPkQOU= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 4286135389694337657 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: Juzhe-Zhong Subject: [Committed V3] RISC-V: Add has compatible check for conflict vsetvl fusion Date: Thu, 18 Jan 2024 09:08:15 +0800 Message-Id: <20240118010815.3113362-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, LIKELY_SPAM_BODY, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SCC_10_SHORT_WORD_LINES, SCC_5_SHORT_WORD_LINES, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org V3: Rebase to trunk and commit it. This patch fixes SPEC2017 cam4 mismatch issue due to we miss has compatible check for conflict vsetvl fusion. Buggy assembler before this patch: .L69: vsetvli a5,s1,e8,mf4,ta,ma -> buggy vsetvl vsetivli zero,8,e8,mf2,ta,ma vmv.v.i v1,0 vse8.v v1,0(a5) j .L37 .L68: vsetvli a5,s1,e8,mf4,ta,ma -> buggy vsetvl vsetivli zero,8,e8,mf2,ta,ma addi a3,a5,8 vmv.v.i v1,0 vse8.v v1,0(a5) vse8.v v1,0(a3) addi a4,a4,-16 li a3,8 bltu a4,a3,.L37 j .L69 .L67: vsetivli zero,8,e8,mf2,ta,ma vmv.v.i v1,0 vse8.v v1,0(a5) addi a5,sp,56 vse8.v v1,0(a5) addi s4,sp,64 addi a3,sp,72 vse8.v v1,0(s4) vse8.v v1,0(a3) addi a4,a4,-32 li a3,16 bltu a4,a3,.L36 j .L68 After this patch: .L63: ble s1,zero,.L49 slli a4,s1,3 li a3,32 addi a5,sp,48 bltu a4,a3,.L62 vsetivli zero,8,e8,mf2,ta,ma vmv.v.i v1,0 vse8.v v1,0(a5) addi a5,sp,56 vse8.v v1,0(a5) addi s4,sp,64 addi a3,sp,72 vse8.v v1,0(s4) addi a4,a4,-32 addi a5,sp,80 vse8.v v1,0(a3) .L35: li a3,16 bltu a4,a3,.L36 addi a3,a5,8 vmv.v.i v1,0 addi a4,a4,-16 vse8.v v1,0(a5) addi a5,a5,16 vse8.v v1,0(a3) .L36: li a3,8 bltu a4,a3,.L37 vmv.v.i v1,0 vse8.v v1,0(a5) Tested on both RV32/RV64 no regression, Ok for trunk ? PR target/113429 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): Fix bug. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c: Adapt test. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c: Ditto. --- gcc/config/riscv/riscv-vsetvl.cc | 43 +++++++++++-------- .../riscv/rvv/vsetvl/vlmax_conflict-4.c | 5 +-- .../riscv/rvv/vsetvl/vlmax_conflict-5.c | 10 ++--- 3 files changed, 30 insertions(+), 28 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 41d4b80648f..2067073185f 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -2254,6 +2254,22 @@ private: return true; } + bool has_compatible_reaching_vsetvl_p (vsetvl_info info) + { + unsigned int index; + sbitmap_iterator sbi; + EXECUTE_IF_SET_IN_BITMAP (m_vsetvl_def_in[info.get_bb ()->index ()], 0, + index, sbi) + { + const auto prev_info = *m_vsetvl_def_exprs[index]; + if (!prev_info.valid_p ()) + continue; + if (m_dem.compatible_p (prev_info, info)) + return true; + } + return false; + } + bool preds_all_same_avl_and_ratio_p (const vsetvl_info &curr_info) { gcc_assert ( @@ -3076,22 +3092,8 @@ pre_vsetvl::earliest_fuse_vsetvl_info (int iter) { vsetvl_info new_curr_info = curr_info; new_curr_info.set_bb (crtl->ssa->bb (eg->dest)); - bool has_compatible_p = false; - unsigned int def_expr_index; - sbitmap_iterator sbi2; - EXECUTE_IF_SET_IN_BITMAP ( - m_vsetvl_def_in[new_curr_info.get_bb ()->index ()], 0, - def_expr_index, sbi2) - { - vsetvl_info &prev_info = *m_vsetvl_def_exprs[def_expr_index]; - if (!prev_info.valid_p ()) - continue; - if (m_dem.compatible_p (prev_info, new_curr_info)) - { - has_compatible_p = true; - break; - } - } + bool has_compatible_p + = has_compatible_reaching_vsetvl_p (new_curr_info); if (!has_compatible_p) { if (dump_file && (dump_flags & TDF_DETAILS)) @@ -3146,7 +3148,10 @@ pre_vsetvl::earliest_fuse_vsetvl_info (int iter) else { /* Cancel lift up if probabilities are equal. */ - if (successors_probability_equal_p (eg->src)) + if (successors_probability_equal_p (eg->src) + || (dest_block_info.probability + > src_block_info.probability + && !has_compatible_reaching_vsetvl_p (curr_info))) { if (dump_file && (dump_flags & TDF_DETAILS)) { @@ -3154,8 +3159,8 @@ pre_vsetvl::earliest_fuse_vsetvl_info (int iter) " Reset bb %u:", eg->src->index); prev_info.dump (dump_file, " "); - fprintf (dump_file, - " due to (same probability):"); + fprintf (dump_file, " due to (same probability or no " + "compatible reaching):"); curr_info.dump (dump_file, " "); } src_block_info.set_empty_info (); diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c index 28ffe2c687a..dedbc94fb29 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c @@ -23,7 +23,6 @@ void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, si /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+\.L[0-9]:+} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c index cd94fdae4b4..26db192d836 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c @@ -17,15 +17,13 @@ void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, si vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 300); *(vuint16mf2_t*)(out + i + 300) = v; } else { - vbool1_t v = *(vbool1_t*)(in + i + 400); - *(vbool1_t*)(out + i + 400) = v; + vint8mf8_t v = *(vint8mf8_t*)(in + i + 400); + *(vint8mf8_t*)(out + i + 400) = v; } } } /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */