From patchwork Tue Jan 16 02:24:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiahao Xu X-Patchwork-Id: 84153 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BDADE3858413 for ; Tue, 16 Jan 2024 02:25:00 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 3D6943858425 for ; Tue, 16 Jan 2024 02:24:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3D6943858425 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 3D6943858425 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705371865; cv=none; b=VKnngnYD8Ru6/V5RU0sH5Dp0qN/047NgZeA/3OaAaUdRMRJdSpo6Ho2YluOVb+eX3Ua+V4caA8ni4lhUW8VGa9NEbugSiJ3TYy6C8sbSn/Tfs/u6AqekvJtq6ImGFWaTQPyxFTevGBUqoIGUU000cwDaEKhBWIlfF9JP7W1aqEI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705371865; c=relaxed/simple; bh=s8q9ZZDEGNDXkJncHpqlmKGB5Dmyd1DbzJed8E/8MlY=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=w7/NftCqUv7f6p/jO44SEO84LdSgVThY2G6GEJgtN9+xqb4JjFapLcLIT+F38GBr2k2fM4BW4aZGKG7Jqlpv7udvaK99TuHrKloVH8ykpnM9Q/cmwwZs8PqYO31tVejjN6cXOcHSllP4bYEIpOAPhWQZ8QuOVk37EK0VGh/daN4= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.10.130.252]) by gateway (Coremail) with SMTP id _____8AxafDT6KVlpowAAA--.2891S3; Tue, 16 Jan 2024 10:24:19 +0800 (CST) Received: from slurm-master.loongson.cn (unknown [10.10.130.252]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Ax3c7T6KVlOx0DAA--.16210S4; Tue, 16 Jan 2024 10:24:19 +0800 (CST) From: Jiahao Xu To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, chenglulu@loongson.cn, xuchenghua@loongson.cn, Jiahao Xu Subject: [PATCH] LoongArch: Fix pattern vec_concatz Date: Tue, 16 Jan 2024 10:24:17 +0800 Message-Id: <20240116022417.51862-1-xujiahao@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Ax3c7T6KVlOx0DAA--.16210S4 X-CM-SenderInfo: 50xmxthkdrqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBj93XoW7tr45KFW5Jw48CrW8urWUKFX_yoW8Kr18pF ZrZ3saqr48JFnxWrnrX3s5XwsIyFn7Kw13ZrW3Aas7Cw13JrWxur48Gry2vF45Z398WrZ3 Xrs3uay8Za1jgwcCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6r4j6r4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI0UMc 02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWUXVWUAwAv7VC2z280aVAF wI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxAIw28IcxkI7V AKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCj r7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY6x IIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAI w20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x 0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxUwmhFDUUUU X-Spam-Status: No, score=-13.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org In r14-7022-34d339bbd0c1f5b4ad9587e7ae8387c912cb028b I implement pattern vec_concatz, the reg+reg addressing mode is not supported in vec_concatz. This patch fixes that. gcc/ChangeLog: * config/loongarch/lasx.md (vec_concatz): Fix pattern to support reg+reg addressing mode. gcc/testsuite/ChangeLog: * gcc.target/loongarch/vect-concatz.c: New test. diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md index 90f66ee4d24..77ab754fa9e 100644 --- a/gcc/config/loongarch/lasx.md +++ b/gcc/config/loongarch/lasx.md @@ -589,10 +589,8 @@ (define_insn "@vec_concatz" (match_operand: 2 "const_0_operand")))] "ISA_HAS_LASX" { - if (MEM_P (operands[1])) - return "vld\t%w0,%1"; - else - return "vori.b\t%w0,%w1,0"; + return loongarch_output_move (gen_lowpart (mode, + operands[0]), operands[1]); } [(set_attr "type" "simd_splat") (set_attr "mode" "")]) diff --git a/gcc/testsuite/gcc.target/loongarch/vect-concatz.c b/gcc/testsuite/gcc.target/loongarch/vect-concatz.c new file mode 100644 index 00000000000..45aa776c11b --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/vect-concatz.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -mlasx -fno-vect-cost-model" } */ + +#include + +typedef struct +{ + int *rect; + float *rect_float; + unsigned int x; + unsigned int y; +} ImBuf; + +ImBuf * +IMB_double_fast_x(ImBuf *ibuf1, ImBuf *ibuf2) +{ + int *p1, *dest, i, col, do_rect, do_float; + float *p1f, *destf; + + if (ibuf1 == NULL) return (NULL); + if (ibuf1->rect == NULL && ibuf1->rect_float == NULL) return (NULL); + + do_rect = (ibuf1->rect != NULL); + do_float = (ibuf1->rect_float != NULL); + + + p1 = (int *) ibuf1->rect; + dest = (int *) ibuf2->rect; + p1f = (float *)ibuf1->rect_float; + destf = (float *)ibuf2->rect_float; + + for (i = ibuf1->y * ibuf1->x; i > 0; i--) { + if (do_rect) { + col = *p1++; + *dest++ = col; + *dest++ = col; + } + if (do_float) { + destf[0] = destf[4] = p1f[0]; + destf[1] = destf[5] = p1f[1]; + destf[2] = destf[6] = p1f[2]; + destf[3] = destf[7] = p1f[3]; + destf += 8; + p1f += 4; + } + } + + return (ibuf2); +} + +int +main() +{ + return 0; +}