From patchwork Tue Dec 19 06:59:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 82435 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9C176386185E for ; Tue, 19 Dec 2023 07:00:36 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from xry111.site (xry111.site [89.208.246.23]) by sourceware.org (Postfix) with ESMTPS id A65033857437 for ; Tue, 19 Dec 2023 07:00:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A65033857437 Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=xry111.site Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=xry111.site ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A65033857437 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=89.208.246.23 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702969221; cv=none; b=mbazqlfojXwHDZnYotext4hsl3aI0XgvPO9p7BPYHqYMC635Zz97BViN+eLkt4L0Se5btFSzQ8COcC/VC+VORwseccQoDfaBlosH0+DgJ5fRAP4YMfmiEaCvq5IB3vCn4qxZWlgztVxEC9gmVb4etzEsnMzPP6kIWfTMVG/fcg0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702969221; c=relaxed/simple; bh=3+Ok7EHzieZKr95f/pVrESTcGN5Q1PtabpkbQT+TdOo=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=H5qmdAur5VV+JcswUqBBSKl/PbRqOAi1y6S3pdFoahewiHgQq8FFltOSVnAEhbcjLCGyCQqoA1djykEBkEtC1UE6BhK74i45Hw96w3N3J36t/my3qgXnbwalf6+9IIghgFk5TCILEMGXBzytn4Agt4qLGQO3sJmZvjqG1QdMy/c= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xry111.site; s=default; t=1702969219; bh=3+Ok7EHzieZKr95f/pVrESTcGN5Q1PtabpkbQT+TdOo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aBjVwzZxycShsWgMtw8BPYz8DHC8EtFaTe0+1TPxlR/CHxEQ73u20u5Vnvn0XuC6u LuWOUB15K+5PVJIglAsGoR4wldk7bkZAbnVaA/W/hXc/xiekQJDb4AFdaUzWU3H5dU 1uzJ1jENjUrFCBEjCCjOv6FmURUwPT4kETJ4aOUg= Received: from stargazer.. (unknown [IPv6:240e:358:119f:400:dc73:854d:832e:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 31F7A66A06; Tue, 19 Dec 2023 02:00:15 -0500 (EST) From: Xi Ruoyao To: gcc-patches@gcc.gnu.org Cc: chenglulu , i@xen0n.name, xuchenghua@loongson.cn, c@jia.je, Xi Ruoyao Subject: [PATCH 2/2] LoongArch: Clean up vec_init expander Date: Tue, 19 Dec 2023 14:59:57 +0800 Message-ID: <20231219065957.70665-3-xry111@xry111.site> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231219065957.70665-1-xry111@xry111.site> References: <20231219065957.70665-1-xry111@xry111.site> MIME-Version: 1.0 X-Spam-Status: No, score=-8.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, LIKELY_SPAM_FROM, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Non functional change, clean up the code. gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_expand_vector_init_same): Remove "temp2" and reuse "temp" instead. (loongarch_expand_vector_init): Use gcc_unreachable () instead of gcc_assert (0), and fix the comment for it. --- gcc/config/loongarch/loongarch.cc | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index ef81414342d..5ffd06ce9be 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -10748,7 +10748,7 @@ loongarch_expand_vector_init_same (rtx target, rtx vals, unsigned nvar) machine_mode vmode = GET_MODE (target); machine_mode imode = GET_MODE_INNER (vmode); rtx same = XVECEXP (vals, 0, 0); - rtx temp, temp2; + rtx temp; if (CONST_INT_P (same) && nvar == 0 && loongarch_signed_immediate_p (INTVAL (same), 10, 0)) @@ -10772,17 +10772,17 @@ loongarch_expand_vector_init_same (rtx target, rtx vals, unsigned nvar) } if (imode == GET_MODE (same)) - temp2 = same; + temp = same; else if (GET_MODE_SIZE (imode) >= UNITS_PER_WORD) { if (GET_CODE (same) == MEM) { rtx reg_tmp = gen_reg_rtx (GET_MODE (same)); loongarch_emit_move (reg_tmp, same); - temp2 = simplify_gen_subreg (imode, reg_tmp, GET_MODE (reg_tmp), 0); + temp = simplify_gen_subreg (imode, reg_tmp, GET_MODE (reg_tmp), 0); } else - temp2 = simplify_gen_subreg (imode, same, GET_MODE (same), 0); + temp = simplify_gen_subreg (imode, same, GET_MODE (same), 0); } else { @@ -10790,13 +10790,13 @@ loongarch_expand_vector_init_same (rtx target, rtx vals, unsigned nvar) { rtx reg_tmp = gen_reg_rtx (GET_MODE (same)); loongarch_emit_move (reg_tmp, same); - temp2 = lowpart_subreg (imode, reg_tmp, GET_MODE (reg_tmp)); + temp = lowpart_subreg (imode, reg_tmp, GET_MODE (reg_tmp)); } else - temp2 = lowpart_subreg (imode, same, GET_MODE (same)); + temp = lowpart_subreg (imode, same, GET_MODE (same)); } - temp = force_reg (imode, temp2); + temp = force_reg (imode, temp); switch (vmode) { @@ -11142,8 +11142,8 @@ loongarch_expand_vector_init (rtx target, rtx vals) return; } - /* Loongson is the only cpu with vectors with more elements. */ - gcc_assert (0); + /* No LoongArch CPU supports vectors with more elements as at now. */ + gcc_unreachable (); } /* Implement HARD_REGNO_CALLER_SAVE_MODE. */