From patchwork Thu Dec 14 12:49:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiahao Xu X-Patchwork-Id: 82137 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BB3B7386181C for ; Thu, 14 Dec 2023 12:49:41 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:470:142:3::10]) by sourceware.org (Postfix) with ESMTPS id 024A3385C6D7 for ; Thu, 14 Dec 2023 12:49:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 024A3385C6D7 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 024A3385C6D7 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:470:142:3::10 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702558166; cv=none; b=qFgVeioo+ZV+NZ1YLzva8ae/CKJHAKAExvN3/steyJ8vYD5PkAkJ63Hp/UCUo0MxRR9zkUoz9gxX+PgWnoRT8lBZQyNoqBt6dNPTiELXs5QmVm2es77Y89Jql5/dxbXehN05kRsIMyNt1Ps1JtSw7Ilgyx7vn71ngbwQNW9IeLM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702558166; c=relaxed/simple; bh=pAHVL6JM2EkyTJICrBIG9ZKeryf96f9wXRJNzmPvCp8=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=DM0F3X17/Gdrm2+Ej2JZMEw2GxRY6fjKlttUPGzbVqGHGqJ1YxDgjx1I2pbPe7BLQJQBlgdwLDvmpqo/Qx3UwA6OrdGhsERc8awRdvtNKGqcdZBH8ZwjCIfFQm4VPnBPgiUaCJ5a0KQDZbYhNIAiyfrphxaqxHzT4efi4sM72DM= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rDl9W-0005BT-Am for gcc-patches@gcc.gnu.org; Thu, 14 Dec 2023 07:49:24 -0500 Received: from loongson.cn (unknown [10.10.130.252]) by gateway (Coremail) with SMTP id _____8DxS+nE+XplVwEBAA--.5828S3; Thu, 14 Dec 2023 20:49:08 +0800 (CST) Received: from slurm-master.loongson.cn (unknown [10.10.130.252]) by localhost.localdomain (Coremail) with SMTP id AQAAf8DxSXPD+XplMD4EAA--.8879S4; Thu, 14 Dec 2023 20:49:07 +0800 (CST) From: Jiahao Xu To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, chenglulu@loongson.cn, xuchenghua@loongson.cn, Jiahao Xu Subject: [PATCH v2] LoongArch: Fix incorrect code generation for sad pattern Date: Thu, 14 Dec 2023 20:49:04 +0800 Message-Id: <20231214124904.5801-1-xujiahao@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8DxSXPD+XplMD4EAA--.8879S4 X-CM-SenderInfo: 50xmxthkdrqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBj93XoWxZr18ZF1rZFy7uF48CrW5CFX_yoW5WF4rpr WDG3WxC3WkJ3WSy3WkGrWUWr4xXry7GFs7ua98KFZFkw4avr4DuryrKr1aga4qqw4Fvry7 u3Z8AFWjyFy8KrgCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkYb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVWxJr0_GcWle2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27w Aqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE 14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x 0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E 7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcV C0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF 04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7 CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU1CPfJUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=xujiahao@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Spam-Status: No, score=-13.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_FAIL, SPF_HELO_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org When I attempt to enable vect_usad_char effective target for LoongArch, slp-reduc-sad.c and vect-reduc-sad*.c tests fail. These tests fail because the sad pattern generates bad code. This patch to fixed them, for sad patterns, use zero expansion instead of sign expansion for reduction. Currently, we are fixing failed vectorized tests, and in the future, we will enable more tests of "vect" for LoongArch. gcc/ChangeLog: * config/loongarch/lasx.md: Use zero expansion instruction. * config/loongarch/lsx.md: Ditto. diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md index eeac8cd984b..db6871507e2 100644 --- a/gcc/config/loongarch/lasx.md +++ b/gcc/config/loongarch/lasx.md @@ -5097,8 +5097,8 @@ (define_expand "usadv32qi" rtx t2 = gen_reg_rtx (V16HImode); rtx t3 = gen_reg_rtx (V8SImode); emit_insn (gen_lasx_xvabsd_u_bu (t1, operands[1], operands[2])); - emit_insn (gen_lasx_xvhaddw_h_b (t2, t1, t1)); - emit_insn (gen_lasx_xvhaddw_w_h (t3, t2, t2)); + emit_insn (gen_lasx_xvhaddw_hu_bu (t2, t1, t1)); + emit_insn (gen_lasx_xvhaddw_wu_hu (t3, t2, t2)); emit_insn (gen_addv8si3 (operands[0], t3, operands[3])); DONE; }) @@ -5114,8 +5114,8 @@ (define_expand "ssadv32qi" rtx t2 = gen_reg_rtx (V16HImode); rtx t3 = gen_reg_rtx (V8SImode); emit_insn (gen_lasx_xvabsd_s_b (t1, operands[1], operands[2])); - emit_insn (gen_lasx_xvhaddw_h_b (t2, t1, t1)); - emit_insn (gen_lasx_xvhaddw_w_h (t3, t2, t2)); + emit_insn (gen_lasx_xvhaddw_hu_bu (t2, t1, t1)); + emit_insn (gen_lasx_xvhaddw_wu_hu (t3, t2, t2)); emit_insn (gen_addv8si3 (operands[0], t3, operands[3])); DONE; }) diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md index dbdb423011b..5e5e2503636 100644 --- a/gcc/config/loongarch/lsx.md +++ b/gcc/config/loongarch/lsx.md @@ -3468,8 +3468,8 @@ (define_expand "usadv16qi" rtx t2 = gen_reg_rtx (V8HImode); rtx t3 = gen_reg_rtx (V4SImode); emit_insn (gen_lsx_vabsd_u_bu (t1, operands[1], operands[2])); - emit_insn (gen_lsx_vhaddw_h_b (t2, t1, t1)); - emit_insn (gen_lsx_vhaddw_w_h (t3, t2, t2)); + emit_insn (gen_lsx_vhaddw_hu_bu (t2, t1, t1)); + emit_insn (gen_lsx_vhaddw_wu_hu (t3, t2, t2)); emit_insn (gen_addv4si3 (operands[0], t3, operands[3])); DONE; }) @@ -3485,8 +3485,8 @@ (define_expand "ssadv16qi" rtx t2 = gen_reg_rtx (V8HImode); rtx t3 = gen_reg_rtx (V4SImode); emit_insn (gen_lsx_vabsd_s_b (t1, operands[1], operands[2])); - emit_insn (gen_lsx_vhaddw_h_b (t2, t1, t1)); - emit_insn (gen_lsx_vhaddw_w_h (t3, t2, t2)); + emit_insn (gen_lsx_vhaddw_hu_bu (t2, t1, t1)); + emit_insn (gen_lsx_vhaddw_wu_hu (t3, t2, t2)); emit_insn (gen_addv4si3 (operands[0], t3, operands[3])); DONE; })