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Thu, 8 Jun 2023 01:55:57 GMT Received: from smtprelay04.fra02v.mail.ibm.com ([9.218.2.228]) by ppma06fra.de.ibm.com (PPS) with ESMTPS id 3r2a7a0p6q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 08 Jun 2023 01:55:56 +0000 Received: from smtpav01.fra02v.mail.ibm.com (smtpav01.fra02v.mail.ibm.com [10.20.54.100]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 3581trRD31982156 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 8 Jun 2023 01:55:53 GMT Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 86EEF20043; Thu, 8 Jun 2023 01:55:53 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 70C8820040; Thu, 8 Jun 2023 01:55:52 +0000 (GMT) Received: from ltcden2-lp1.aus.stglabs.ibm.com (unknown [9.3.90.43]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 8 Jun 2023 01:55:52 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, bergner@linux.ibm.com, guojiufu@linux.ibm.com Subject: [PATCH 3/4] rs6000: build constant via li/lis;rldicl/rldicr Date: Thu, 8 Jun 2023 09:55:46 +0800 Message-Id: <20230608015547.3432691-4-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230608015547.3432691-1-guojiufu@linux.ibm.com> References: <20230608015547.3432691-1-guojiufu@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: -g7ZwFAbQcCm6cKn0rgB0ZbyYunnQoDX X-Proofpoint-ORIG-GUID: KEwuGiux7hvg9LFRJX452w9N4ncoFir- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_13,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 phishscore=0 clxscore=1015 suspectscore=0 impostorscore=0 mlxlogscore=999 spamscore=0 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306080010 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jiufu Guo via Gcc-patches From: Jiufu Guo Reply-To: Jiufu Guo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch checks if a constant is possible left/right cleaned on a rotated value from a negative value of "li/lis". If so, we can build the constant through "li/lis ; rldicl/rldicr". Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk? BR, Jeff (Jiufu) gcc/ChangeLog: * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New function. (can_be_built_by_li_lis_and_rldicr): New function. (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and can_be_built_by_li_lis_and_rldicl. gcc/testsuite/ChangeLog: * gcc.target/powerpc/const-build.c: Add more tests. --- gcc/config/rs6000/rs6000.cc | 61 ++++++++++++++++++- .../gcc.target/powerpc/const-build.c | 44 +++++++++++++ 2 files changed, 104 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 03cd9d5e952..2a3fa733b45 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10332,6 +10332,61 @@ can_be_built_by_li_lis_and_rotldi (HOST_WIDE_INT c, int *shift, return false; } +/* Check if value C can be built by 2 instructions: one is 'li or lis', + another is rldicl. + + If so, *SHIFT is set to the shift operand of rldicl, and *MASK is set to + the mask operand of rldicl, and return true. + Return false otherwise. */ + +static bool +can_be_built_by_li_lis_and_rldicl (HOST_WIDE_INT c, int *shift, + HOST_WIDE_INT *mask) +{ + /* Leading zeros may be cleaned by rldicl with a mask. Change leading zeros + to ones and then recheck it. */ + int lz = clz_hwi (c); + HOST_WIDE_INT unmask_c + = c | (HOST_WIDE_INT_M1U << (HOST_BITS_PER_WIDE_INT - lz)); + int n; + if (can_be_rotated_to_negative_li (unmask_c, &n) + || can_be_rotated_to_negative_lis (unmask_c, &n)) + { + *mask = HOST_WIDE_INT_M1U >> lz; + *shift = n == 0 ? 0 : HOST_BITS_PER_WIDE_INT - n; + return true; + } + + return false; +} + +/* Check if value C can be built by 2 instructions: one is 'li or lis', + another is rldicr. + + If so, *SHIFT is set to the shift operand of rldicr, and *MASK is set to + the mask operand of rldicr, and return true. + Return false otherwise. */ + +static bool +can_be_built_by_li_lis_and_rldicr (HOST_WIDE_INT c, int *shift, + HOST_WIDE_INT *mask) +{ + /* Tailing zeros may be cleaned by rldicr with a mask. Change tailing zeros + to ones and then recheck it. */ + int tz = ctz_hwi (c); + HOST_WIDE_INT unmask_c = c | ((HOST_WIDE_INT_1U << tz) - 1); + int n; + if (can_be_rotated_to_negative_li (unmask_c, &n) + || can_be_rotated_to_negative_lis (unmask_c, &n)) + { + *mask = HOST_WIDE_INT_M1U << tz; + *shift = HOST_BITS_PER_WIDE_INT - n; + return true; + } + + return false; +} + /* Subroutine of rs6000_emit_set_const, handling PowerPC64 DImode. Output insns to set DEST equal to the constant C as a series of lis, ori and shl instructions. */ @@ -10378,7 +10433,9 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) emit_move_insn (dest, gen_rtx_XOR (DImode, temp, GEN_INT ((ud2 ^ 0xffff) << 16))); } - else if (can_be_built_by_li_lis_and_rotldi (c, &shift, &mask)) + else if (can_be_built_by_li_lis_and_rotldi (c, &shift, &mask) + || can_be_built_by_li_lis_and_rldicl (c, &shift, &mask) + || can_be_built_by_li_lis_and_rldicr (c, &shift, &mask)) { temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); unsigned HOST_WIDE_INT imm = (c | ~mask); @@ -10387,6 +10444,8 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) emit_move_insn (temp, GEN_INT (imm)); if (shift != 0) temp = gen_rtx_ROTATE (DImode, temp, GEN_INT (shift)); + if (mask != HOST_WIDE_INT_M1) + temp = gen_rtx_AND (DImode, temp, GEN_INT (mask)); emit_move_insn (dest, temp); } else if (ud3 == 0 && ud4 == 0) diff --git a/gcc/testsuite/gcc.target/powerpc/const-build.c b/gcc/testsuite/gcc.target/powerpc/const-build.c index c38a1dd91f2..8c209921d41 100644 --- a/gcc/testsuite/gcc.target/powerpc/const-build.c +++ b/gcc/testsuite/gcc.target/powerpc/const-build.c @@ -46,6 +46,42 @@ lis_rotldi_6 (void) return 0x5310000ffffffff8LL; } +long long NOIPA +li_rldicl_7 (void) +{ + return 0x3ffffffa1LL; +} + +long long NOIPA +li_rldicl_8 (void) +{ + return 0xff8531ffffffffLL; +} + +long long NOIPA +lis_rldicl_9 (void) +{ + return 0x00ff85310000ffffLL; +} + +long long NOIPA +li_rldicr_10 (void) +{ + return 0xffff8531fff00000LL; +} + +long long NOIPA +li_rldicr_11 (void) +{ + return 0x21fffffffff00000LL; +} + +long long NOIPA +lis_rldicr_12 (void) +{ + return 0x5310000ffffffff0LL; +} + struct fun arr[] = { {li_rotldi_1, 0x7531000000000LL}, {li_rotldi_2, 0x2100000000000064LL}, @@ -53,9 +89,17 @@ struct fun arr[] = { {li_rotldi_4, 0x21ffffffffffff94LL}, {lis_rotldi_5, 0xffff85310000ffffLL}, {lis_rotldi_6, 0x5310000ffffffff8LL}, + {li_rldicl_7, 0x3ffffffa1LL}, + {li_rldicl_8, 0xff8531ffffffffLL}, + {lis_rldicl_9, 0x00ff85310000ffffLL}, + {li_rldicr_10, 0xffff8531fff00000LL}, + {li_rldicr_11, 0x21fffffffff00000LL}, + {lis_rldicr_12, 0x5310000ffffffff0LL}, }; /* { dg-final { scan-assembler-times {\mrotldi\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mrldicl\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mrldicr\M} 3 } } */ int main ()