From patchwork Sun Jun 4 09:25:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 70568 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3D0B63858433 for ; Sun, 4 Jun 2023 09:25:30 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbguseast1.qq.com (smtpbguseast1.qq.com [54.204.34.129]) by sourceware.org (Postfix) with ESMTPS id 4A8593858D32 for ; Sun, 4 Jun 2023 09:25:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4A8593858D32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp77t1685870705tnxo8s6y Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Sun, 04 Jun 2023 17:25:04 +0800 (CST) X-QQ-SSF: 01400000000000F0S000000A0000000 X-QQ-FEAT: RrZlkntZBflKyA3T+PIMtP0JnDaxStBc+NiJSEoHuUquy8oX/bNJj/Vrh/VAS 54Tb7iB8NiMpFtMosZRha1sW4PinnrnK4CYQcK9ehYbpLYIo0Cmho8RD3jRXjQBH+tWYP2O WRCM7BQ/JjDQZCpb+LAsjwwuWYcZPgi155bzHDjUS87hXYSZrrlrHxHet3cN4YIg6h++jvD u3Gfl7KTfzUz+HdYocu9Ue1BUK50ivtb5bSrAV1Au4a3728SzMjCiAe/kcL3nGYYVbCclty AwrCEPeE0XFdTkwMR2wvKRZBiyl0RkFUyK3sR9VwBpPR1fMDjPZJ+wVPQ6gb4ewDWLlM6rW IZkWp6StpYp4KrzLJfjV6SG5+WjFt49as7VBIlv2QrrGRDZ9nY+dq5jtCeV3DPD62tgtrP7 X-QQ-GoodBg: 2 X-BIZMAIL-ID: 3914778472611948333 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@sifive.com, palmer@rivosinc.com, rdapp.gcc@gmail.com, jeffreyalaw@gmail.com, Juzhe-Zhong Subject: [PATCH] RISC-V: Split arguments of expand_vec_perm Date: Sun, 4 Jun 2023 17:25:03 +0800 Message-Id: <20230604092503.4009600-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: Juzhe-Zhong Since the following patch will calls expand_vec_perm with splitted arguments, change the expand_vec_perm interface in this patch. gcc/ChangeLog: * config/riscv/autovec.md: Split arguments. * config/riscv/riscv-protos.h (expand_vec_perm): Ditto. * config/riscv/riscv-v.cc (expand_vec_perm): Ditto. --- gcc/config/riscv/autovec.md | 3 ++- gcc/config/riscv/riscv-protos.h | 2 +- gcc/config/riscv/riscv-v.cc | 6 +----- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md index 5c3aad7ee44..ec038fe87cd 100644 --- a/gcc/config/riscv/autovec.md +++ b/gcc/config/riscv/autovec.md @@ -96,7 +96,8 @@ (match_operand: 3 "vector_perm_operand")] "TARGET_VECTOR && GET_MODE_NUNITS (mode).is_constant ()" { - riscv_vector::expand_vec_perm (operands); + riscv_vector::expand_vec_perm (operands[0], operands[1], + operands[2], operands[3]); DONE; } ) diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index d032f569a36..00e1b20c6c6 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -241,7 +241,7 @@ opt_machine_mode get_mask_mode (machine_mode); void expand_vec_series (rtx, rtx, rtx); void expand_vec_init (rtx, rtx); void expand_vcond (rtx *); -void expand_vec_perm (rtx *); +void expand_vec_perm (rtx, rtx, rtx, rtx); /* Rounding mode bitfield for fixed point VXRM. */ enum vxrm_field_enum { diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index fa13bd94f9d..49752cd8899 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -2025,12 +2025,8 @@ expand_vcond (rtx *ops) /* Implement vec_perm. */ void -expand_vec_perm (rtx *operands) +expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel) { - rtx target = operands[0]; - rtx op0 = operands[1]; - rtx op1 = operands[2]; - rtx sel = operands[3]; machine_mode data_mode = GET_MODE (target); machine_mode sel_mode = GET_MODE (sel);