diff mbox series

[V2] RISC-V: Fix warning in predicated.md

Message ID 20230602093333.19552-1-juzhe.zhong@rivai.ai
State Committed
Commit f5c82bff5ef2930583eccc008cf73653720987b5
Headers
Series [V2] RISC-V: Fix warning in predicated.md |

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Commit Message

juzhe.zhong@rivai.ai June 2, 2023, 9:33 a.m. UTC 
  From: Juzhe-Zhong <juzhe.zhong@rivai.ai>

Notice there is warning in predicates.md:
../../../riscv-gcc/gcc/config/riscv/predicates.md: In function ‘bool arith_operand_or_mode_mask(rtx, machine_mode)’:
../../../riscv-gcc/gcc/config/riscv/predicates.md:33:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
             (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
../../../riscv-gcc/gcc/config/riscv/predicates.md:34:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     || INTVAL (op) == GET_MODE_MASK (SImode)"))))

gcc/ChangeLog:

        * config/riscv/predicates.md: Change INTVAL into UINTVAL.

---
 gcc/config/riscv/predicates.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jeff Law June 2, 2023, 8:57 p.m. UTC | #1 
On 6/2/23 03:33, juzhe.zhong@rivai.ai wrote:
> From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
> 
> Notice there is warning in predicates.md:
> ../../../riscv-gcc/gcc/config/riscv/predicates.md: In function ‘bool arith_operand_or_mode_mask(rtx, machine_mode)’:
> ../../../riscv-gcc/gcc/config/riscv/predicates.md:33:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
>               (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
> ../../../riscv-gcc/gcc/config/riscv/predicates.md:34:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
>       || INTVAL (op) == GET_MODE_MASK (SImode)"))))
> 
> gcc/ChangeLog:
> 
>          * config/riscv/predicates.md: Change INTVAL into UINTVAL.
> 
> ---
>   gcc/config/riscv/predicates.md | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
> index d14b1ca30bb..04ca6ceabc7 100644
> --- a/gcc/config/riscv/predicates.md
> +++ b/gcc/config/riscv/predicates.md
> @@ -30,7 +30,7 @@
>   (define_predicate "arith_operand_or_mode_mask"
>     (ior (match_operand 0 "arith_operand")
>          (and (match_code "const_int")
> -            (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
> +            (match_test "UINTVAL (op) == GET_MODE_MASK (HImode)
>   			 || UINTVAL (op) == GET_MODE_MASK (SImode)"))))
OK.

jeff
Li, Pan2 via Gcc-patches June 3, 2023, 2:33 a.m. UTC | #2 
Committed, thanks Jeff.

Pan

-----Original Message-----
From: Gcc-patches <gcc-patches-bounces+pan2.li=intel.com@gcc.gnu.org> On Behalf Of Jeff Law via Gcc-patches
Sent: Saturday, June 3, 2023 4:57 AM
To: juzhe.zhong@rivai.ai; gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com; kito.cheng@sifive.com; palmer@dabbelt.com; palmer@rivosinc.com; rdapp.gcc@gmail.com; schwab@linux-m68k.org
Subject: Re: [PATCH V2] RISC-V: Fix warning in predicated.md



On 6/2/23 03:33, juzhe.zhong@rivai.ai wrote:
> From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
> 
> Notice there is warning in predicates.md:
> ../../../riscv-gcc/gcc/config/riscv/predicates.md: In function ‘bool arith_operand_or_mode_mask(rtx, machine_mode)’:
> ../../../riscv-gcc/gcc/config/riscv/predicates.md:33:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
>               (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
> ../../../riscv-gcc/gcc/config/riscv/predicates.md:34:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
>       || INTVAL (op) == GET_MODE_MASK (SImode)"))))
> 
> gcc/ChangeLog:
> 
>          * config/riscv/predicates.md: Change INTVAL into UINTVAL.
> 
> ---
>   gcc/config/riscv/predicates.md | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/gcc/config/riscv/predicates.md 
> b/gcc/config/riscv/predicates.md index d14b1ca30bb..04ca6ceabc7 100644
> --- a/gcc/config/riscv/predicates.md
> +++ b/gcc/config/riscv/predicates.md
> @@ -30,7 +30,7 @@
>   (define_predicate "arith_operand_or_mode_mask"
>     (ior (match_operand 0 "arith_operand")
>          (and (match_code "const_int")
> -            (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
> +            (match_test "UINTVAL (op) == GET_MODE_MASK (HImode)
>   			 || UINTVAL (op) == GET_MODE_MASK (SImode)"))))
OK.

jeff
diff mbox series

Patch

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index d14b1ca30bb..04ca6ceabc7 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -30,7 +30,7 @@ 
 (define_predicate "arith_operand_or_mode_mask"
   (ior (match_operand 0 "arith_operand")
        (and (match_code "const_int")
-            (match_test "INTVAL (op) == GET_MODE_MASK (HImode)
+            (match_test "UINTVAL (op) == GET_MODE_MASK (HImode)
 			 || UINTVAL (op) == GET_MODE_MASK (SImode)"))))
 
 (define_predicate "lui_operand"