From patchwork Fri Jun 2 00:49:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 70484 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 22E7E3857730 for ; Fri, 2 Jun 2023 00:49:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 22E7E3857730 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1685666984; bh=6xVH0Jeyd/jrdRzA4YEnpPhmdmQx2Y0pnpAI7LMFd70=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=mbHAbo4EF1nCMtcsbB8c0TZDaAcl9Y48Nw56s7UWAzAE5HGWpsAcP0kXcm8PD4tPh NR4kBwokvHjZ40/XwXadbFRgo1QR4NPYdw/OlrwDlgNHqgvyzwpvoAG+oZJH0sTkuz hlTlxZidkFEa3NQ3dnB5YIFzt2H4u9IgSPn6HSgo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by sourceware.org (Postfix) with ESMTPS id 3AC1B3858C50 for ; Fri, 2 Jun 2023 00:49:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3AC1B3858C50 X-IronPort-AV: E=McAfee;i="6600,9927,10728"; a="421544510" X-IronPort-AV: E=Sophos;i="6.00,211,1681196400"; d="scan'208";a="421544510" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jun 2023 17:49:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10728"; a="740567050" X-IronPort-AV: E=Sophos;i="6.00,211,1681196400"; d="scan'208";a="740567050" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga001.jf.intel.com with ESMTP; 01 Jun 2023 17:49:09 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id B71DE1007817; Fri, 2 Jun 2023 08:49:08 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: ubizjak@gmail.com Subject: [PATCH] i386: Add missing vector truncate patterns [PR92658]. Date: Fri, 2 Jun 2023 08:49:08 +0800 Message-Id: <20230602004908.2571237-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.39.1.388.g2fc9e9ca3c MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Add missing insn patterns for v2si -> v2hi/v2qi and v2hi-> v2qi vector truncate. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog: PR target/92658 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn. (truncv2si2): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr92658-avx512bw-trunc-2.c: New test. --- gcc/config/i386/mmx.md | 21 +++++++++++++++ .../i386/pr92658-avx512bw-trunc-2.c | 27 +++++++++++++++++++ 2 files changed, 48 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr92658-avx512bw-trunc-2.c diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index dbcb850ffde..bb45098f797 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -3667,6 +3667,27 @@ (define_expand "v2qiv2hi2" DONE; }) +(define_insn "truncv2hiv2qi2" + [(set (match_operand:V2QI 0 "register_operand" "=v") + (truncate:V2QI + (match_operand:V2HI 1 "register_operand" "v")))] + "TARGET_AVX512VL && TARGET_AVX512BW" + "vpmovwb\t{%1, %0|%0, %1}" + [(set_attr "type" "ssemov") + (set_attr "prefix" "evex") + (set_attr "mode" "TI")]) + +(define_mode_iterator V2QI_V2HI [V2QI V2HI]) +(define_insn "truncv2si2" + [(set (match_operand:V2QI_V2HI 0 "register_operand" "=v") + (truncate:V2QI_V2HI + (match_operand:V2SI 1 "register_operand" "v")))] + "TARGET_AVX512VL && TARGET_MMX_WITH_SSE" + "vpmovd\t{%1, %0|%0, %1}" + [(set_attr "type" "ssemov") + (set_attr "prefix" "evex") + (set_attr "mode" "TI")]) + ;; Pack/unpack vector modes (define_mode_attr mmxpackmode [(V4HI "V8QI") (V2SI "V4HI")]) diff --git a/gcc/testsuite/gcc.target/i386/pr92658-avx512bw-trunc-2.c b/gcc/testsuite/gcc.target/i386/pr92658-avx512bw-trunc-2.c new file mode 100644 index 00000000000..2f5b7dc5668 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr92658-avx512bw-trunc-2.c @@ -0,0 +1,27 @@ +/* PR target/92658 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl" } */ +/* { dg-final { scan-assembler-times "vpmovwb" 1 } } */ +/* { dg-final { scan-assembler-times "vpmovdb" 1 { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-times "vpmovdw" 1 { target { ! ia32 } } } } */ + +void +foo (int* __restrict a, char* b) +{ + b[0] = a[0]; + b[1] = a[1]; +} + +void +foo2 (short* __restrict a, char* b) +{ + b[0] = a[0]; + b[1] = a[1]; +} + +void +foo3 (int* __restrict a, short* b) +{ + b[0] = a[0]; + b[1] = a[1]; +}