From patchwork Tue May 30 02:08:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "juzhe.zhong@rivai.ai" X-Patchwork-Id: 70269 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 864B4385660A for ; Tue, 30 May 2023 02:08:56 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbguseast1.qq.com (smtpbguseast1.qq.com [54.204.34.129]) by sourceware.org (Postfix) with ESMTPS id 90DF93858431 for ; Tue, 30 May 2023 02:08:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 90DF93858431 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp80t1685412504tlc61axg Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 30 May 2023 10:08:22 +0800 (CST) X-QQ-SSF: 00400000000000F0R000000A0000000 X-QQ-FEAT: CR3LFp2JE4k2yCeR62ZuAFfmbCKTP0Wtw4P6IeSfmLr0sy5vSZtRdX0aSD87v 5GlN+izFx36AVWkKvYtfj8jf7lA+e+3vaqS4xgWiRdoJYI6n3AWRs4U8TN7arADcyX5qwVs 4PSnckkamQanG86Ua0fPJ2r5XJcNVVPHPs9qGd2dNSaMM/svwfkYmWIli6QVbiwAiwZXqur EIrKUV7QeONtgzE5S9Dg6SOH6RQ+0UCVkD2tcFaLieO1lJ4vLeewteJpcSSGriyZReQHVMn u+dpSr7hHKqExEGD7e6QmpFUIRjRytHs9qL3if+aGIxo2+xxxBAPWFtjKaur3dnJVR9ACH8 kxqHuU4fr59QGh/Y7YI0+tMd0dYrMnRQ4atk+BHGgnTCkQl4v4WT9QZZupwQyjwte7oWCej d6ogA5VxYMU= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 17564662876889857063 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, kito.cheng@sifive.com, palmer@dabbelt.com, palmer@rivosinc.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Juzhe-Zhong Subject: [PATCH V2] RISC-V: Fix warning in riscv.md Date: Tue, 30 May 2023 10:08:21 +0800 Message-Id: <20230530020821.877778-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-5.7 required=5.0 tests=BAYES_00, BODY_8BITS, GIT_PATCH_0, KAM_DMARC_STATUS, MEDICAL_SUBJECT, MIME_CHARSET_FARAWAY, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: Juzhe-Zhong Notice there is warning: ../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] if (INTVAL (operands[2]) == GET_MODE_MASK (HImode)) ../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode)) ../../../riscv-gcc/gcc/config/riscv/riscv.md: In function ‘rtx_def* gen_anddi3(rtx, rtx, rtx)’: ../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] if (INTVAL (operands[2]) == GET_MODE_MASK (HImode)) ../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode)) Add unsigned conversion to fix this warning. gcc/ChangeLog: * config/riscv/riscv.md: Fix signed and unsigned comparison warning. --- gcc/config/riscv/riscv.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index aba203318a7..f545874edc1 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -1353,9 +1353,9 @@ if (CONST_INT_P (operands[2])) { enum machine_mode tmode = VOIDmode; - if (INTVAL (operands[2]) == GET_MODE_MASK (HImode)) + if (UINTVAL (operands[2]) == GET_MODE_MASK (HImode)) tmode = HImode; - else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode)) + else if (UINTVAL (operands[2]) == GET_MODE_MASK (SImode)) tmode = SImode; if (tmode != VOIDmode)