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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT017.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR08MB8818 X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Christophe Lyon via Gcc-patches From: Christophe Lyon Reply-To: Christophe Lyon Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Factorize vrbsrq builtins so that they use parameterized names. 2022-12-12 Christophe Lyon gcc/ * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New. (mve_insn): Add vbrsr. * config/arm/mve.md (mve_vbrsrq_n_f): Rename into ... (@mve_q_n_f): ... this. (mve_vbrsrq_n_): Rename into ... (@mve_q_n_): ... this. (mve_vbrsrq_m_n_): Rename into ... (@mve_q_m_n_): ... this. (mve_vbrsrq_m_n_f): Rename into ... (@mve_q_m_n_f): ... this. --- gcc/config/arm/iterators.md | 10 ++++++++++ gcc/config/arm/mve.md | 20 ++++++++++---------- 2 files changed, 20 insertions(+), 10 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index d1d14488b56..dfc8d9cae72 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -610,6 +610,14 @@ (define_int_iterator MVE_FP_CREATE_ONLY [ VCREATEQ_F ]) +(define_int_iterator MVE_VBRSR_M_N_FP [ + VBRSRQ_M_N_F + ]) + +(define_int_iterator MVE_VBRSR_N_FP [ + VBRSRQ_N_F + ]) + ;; MVE comparison iterators (define_int_iterator MVE_CMP_M [ VCMPCSQ_M_U @@ -900,6 +908,8 @@ (define_int_attr mve_insn [ (VBICQ_M_N_S "vbic") (VBICQ_M_N_U "vbic") (VBICQ_M_S "vbic") (VBICQ_M_U "vbic") (VBICQ_M_F "vbic") (VBICQ_N_S "vbic") (VBICQ_N_U "vbic") + (VBRSRQ_M_N_S "vbrsr") (VBRSRQ_M_N_U "vbrsr") (VBRSRQ_M_N_F "vbrsr") + (VBRSRQ_N_S "vbrsr") (VBRSRQ_N_U "vbrsr") (VBRSRQ_N_F "vbrsr") (VCLSQ_M_S "vcls") (VCLSQ_S "vcls") (VCLZQ_M_S "vclz") (VCLZQ_M_U "vclz") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 7898361b859..beca74d4964 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -529,15 +529,15 @@ (define_insn "mve_vpnotv16bi" ;; ;; [vbrsrq_n_f]) ;; -(define_insn "mve_vbrsrq_n_f" +(define_insn "@mve_q_n_f" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w") (match_operand:SI 2 "s_register_operand" "r")] - VBRSRQ_N_F)) + MVE_VBRSR_N_FP)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vbrsr. %q0, %q1, %2" + ".\t%q0, %q1, %2" [(set_attr "type" "mve_move") ]) @@ -826,7 +826,7 @@ (define_expand "mve_vbicq_s" ;; ;; [vbrsrq_n_u, vbrsrq_n_s]) ;; -(define_insn "mve_vbrsrq_n_" +(define_insn "@mve_q_n_" [ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") @@ -834,7 +834,7 @@ (define_insn "mve_vbrsrq_n_" VBRSRQ_N)) ] "TARGET_HAVE_MVE" - "vbrsr.%# %q0, %q1, %2" + ".%#\t%q0, %q1, %2" [(set_attr "type" "mve_move") ]) @@ -2802,7 +2802,7 @@ (define_insn "@mve_q_m_" ;; ;; [vbrsrq_m_n_u, vbrsrq_m_n_s]) ;; -(define_insn "mve_vbrsrq_m_n_" +(define_insn "@mve_q_m_n_" [ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0") @@ -2812,7 +2812,7 @@ (define_insn "mve_vbrsrq_m_n_" VBRSRQ_M_N)) ] "TARGET_HAVE_MVE" - "vpst\;vbrsrt.%# %q0, %q2, %3" + "vpst\;t.%#\t%q0, %q2, %3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3257,17 +3257,17 @@ (define_insn "@mve_q_m_f" ;; ;; [vbrsrq_m_n_f]) ;; -(define_insn "mve_vbrsrq_m_n_f" +(define_insn "@mve_q_m_n_f" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0") (match_operand:MVE_0 2 "s_register_operand" "w") (match_operand:SI 3 "s_register_operand" "r") (match_operand: 4 "vpr_register_operand" "Up")] - VBRSRQ_M_N_F)) + MVE_VBRSR_M_N_FP)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vbrsrt.%# %q0, %q2, %3" + "vpst\;t.%#\t%q0, %q2, %3" [(set_attr "type" "mve_move") (set_attr "length""8")])