Message ID | 20230428061210.2988035-6-christoph.muellner@vrull.eu |
---|---|
State | Committed |
Commit | b621883620b127caf20e88e59fa73e666960013e |
Delegated to: | Kito Cheng |
Headers |
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[62.178.148.172]) by smtp.gmail.com with ESMTPSA id x20-20020aa7d394000000b00504803f4071sm8669431edq.44.2023.04.27.23.12.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 23:12:20 -0700 (PDT) From: Christoph Muellner <christoph.muellner@vrull.eu> To: gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@sifive.com>, Jim Wilson <jim.wilson.gcc@gmail.com>, Palmer Dabbelt <palmer@dabbelt.com>, Andrew Waterman <andrew@sifive.com>, Philipp Tomsich <philipp.tomsich@vrull.eu>, Cooper Qu <cooper.qu@linux.alibaba.com>, Lifang Xia <lifang_xia@linux.alibaba.com>, Yunhai Shang <yunhai@linux.alibaba.com>, Zhiwei Liu <zhiwei_liu@linux.alibaba.com> Cc: =?utf-8?q?Christoph_M=C3=BCllner?= <christoph.muellner@vrull.eu> Subject: [PATCH 05/11] riscv: Simplify output of MEM addresses Date: Fri, 28 Apr 2023 08:12:06 +0200 Message-Id: <20230428061210.2988035-6-christoph.muellner@vrull.eu> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230428061210.2988035-1-christoph.muellner@vrull.eu> References: <20230428061210.2988035-1-christoph.muellner@vrull.eu> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_MANYTO, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> |
Series |
Improvements for XThead* support
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Commit Message
Christoph Müllner
April 28, 2023, 6:12 a.m. UTC
From: Christoph Müllner <christoph.muellner@vrull.eu> We have the following situation for MEM RTX objects: * TARGET_PRINT_OPERAND expands to riscv_print_operand() * This falls into the default case (unknown or on letter) of the outer switch-case-block and the MEM case of the inner switch-case-block and calls output_address() in final.cc with XEXP (op, 0) (the address) * This calls targetm.asm_out.print_operand_address() which is riscv_print_operand_address() * riscv_print_operand_address() is targeting the address of a MEM RTX * riscv_print_operand_address() calls riscv_print_operand() for the offset and directly prints the register if the address is classified as ADDRESS_REG * This falls into the default case (unknown or on letter) of the outer switch-case-block and the default case of the inner switch-case-block and calls output_addr_const(). However, since we know that offset must be a CONST_INT (which will be followed by a '(<reg>)' string), there is no need to call riscv_print_operand() for the offset. Instead we can take the shortcut and use output_addr_const(). This change also brings the code in riscv_print_operand_address() in line with the other cases, where output_addr_const() is used to print offsets. Tested with GCC regression test suite and SPEC intrate. Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> --- gcc/config/riscv/riscv.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Comments
LGTM, thanks :) On Fri, Apr 28, 2023 at 2:13 PM Christoph Muellner <christoph.muellner@vrull.eu> wrote: > > From: Christoph Müllner <christoph.muellner@vrull.eu> > > We have the following situation for MEM RTX objects: > * TARGET_PRINT_OPERAND expands to riscv_print_operand() > * This falls into the default case (unknown or on letter) of the outer > switch-case-block and the MEM case of the inner switch-case-block and > calls output_address() in final.cc with XEXP (op, 0) (the address) > * This calls targetm.asm_out.print_operand_address() which is > riscv_print_operand_address() > * riscv_print_operand_address() is targeting the address of a MEM RTX > * riscv_print_operand_address() calls riscv_print_operand() for the offset > and directly prints the register if the address is classified as ADDRESS_REG > * This falls into the default case (unknown or on letter) of the outer > switch-case-block and the default case of the inner switch-case-block and > calls output_addr_const(). > > However, since we know that offset must be a CONST_INT (which will be > followed by a '(<reg>)' string), there is no need to call > riscv_print_operand() for the offset. > Instead we can take the shortcut and use output_addr_const(). > > This change also brings the code in riscv_print_operand_address() > in line with the other cases, where output_addr_const() is used > to print offsets. > > Tested with GCC regression test suite and SPEC intrate. > > Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> > --- > gcc/config/riscv/riscv.cc | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc > index 5d2550871c7..92043236b17 100644 > --- a/gcc/config/riscv/riscv.cc > +++ b/gcc/config/riscv/riscv.cc > @@ -4581,7 +4581,7 @@ riscv_print_operand_address (FILE *file, machine_mode mode ATTRIBUTE_UNUSED, rtx > switch (addr.type) > { > case ADDRESS_REG: > - riscv_print_operand (file, addr.offset, 0); > + output_addr_const (file, riscv_strip_unspec_address (addr.offset)); > fprintf (file, "(%s)", reg_names[REGNO (addr.reg)]); > return; > > -- > 2.40.1 >
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 5d2550871c7..92043236b17 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -4581,7 +4581,7 @@ riscv_print_operand_address (FILE *file, machine_mode mode ATTRIBUTE_UNUSED, rtx switch (addr.type) { case ADDRESS_REG: - riscv_print_operand (file, addr.offset, 0); + output_addr_const (file, riscv_strip_unspec_address (addr.offset)); fprintf (file, "(%s)", reg_names[REGNO (addr.reg)]); return;