[05/11] riscv: Simplify output of MEM addresses

Message ID 20230428061210.2988035-6-christoph.muellner@vrull.eu
State Committed
Commit b621883620b127caf20e88e59fa73e666960013e
Delegated to: Kito Cheng
Headers
Series Improvements for XThead* support |

Commit Message

Christoph Müllner April 28, 2023, 6:12 a.m. UTC
  From: Christoph Müllner <christoph.muellner@vrull.eu>

We have the following situation for MEM RTX objects:
* TARGET_PRINT_OPERAND expands to riscv_print_operand()
* This falls into the default case (unknown or on letter) of the outer
  switch-case-block and the MEM case of the inner switch-case-block and
  calls output_address() in final.cc with XEXP (op, 0) (the address)
* This calls targetm.asm_out.print_operand_address() which is
  riscv_print_operand_address()
* riscv_print_operand_address() is targeting the address of a MEM RTX
* riscv_print_operand_address() calls riscv_print_operand() for the offset
  and directly prints the register if the address is classified as ADDRESS_REG
* This falls into the default case (unknown or on letter) of the outer
  switch-case-block and the default case of the inner switch-case-block and
  calls output_addr_const().

However, since we know that offset must be a CONST_INT (which will be
followed by a '(<reg>)' string), there is no need to call
riscv_print_operand() for the offset.
Instead we can take the shortcut and use output_addr_const().

This change also brings the code in riscv_print_operand_address()
in line with the other cases, where output_addr_const() is used
to print offsets.

Tested with GCC regression test suite and SPEC intrate.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
---
 gcc/config/riscv/riscv.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Kito Cheng April 28, 2023, 7:21 a.m. UTC | #1
LGTM, thanks :)

On Fri, Apr 28, 2023 at 2:13 PM Christoph Muellner
<christoph.muellner@vrull.eu> wrote:
>
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> We have the following situation for MEM RTX objects:
> * TARGET_PRINT_OPERAND expands to riscv_print_operand()
> * This falls into the default case (unknown or on letter) of the outer
>   switch-case-block and the MEM case of the inner switch-case-block and
>   calls output_address() in final.cc with XEXP (op, 0) (the address)
> * This calls targetm.asm_out.print_operand_address() which is
>   riscv_print_operand_address()
> * riscv_print_operand_address() is targeting the address of a MEM RTX
> * riscv_print_operand_address() calls riscv_print_operand() for the offset
>   and directly prints the register if the address is classified as ADDRESS_REG
> * This falls into the default case (unknown or on letter) of the outer
>   switch-case-block and the default case of the inner switch-case-block and
>   calls output_addr_const().
>
> However, since we know that offset must be a CONST_INT (which will be
> followed by a '(<reg>)' string), there is no need to call
> riscv_print_operand() for the offset.
> Instead we can take the shortcut and use output_addr_const().
>
> This change also brings the code in riscv_print_operand_address()
> in line with the other cases, where output_addr_const() is used
> to print offsets.
>
> Tested with GCC regression test suite and SPEC intrate.
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> ---
>  gcc/config/riscv/riscv.cc | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 5d2550871c7..92043236b17 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -4581,7 +4581,7 @@ riscv_print_operand_address (FILE *file, machine_mode mode ATTRIBUTE_UNUSED, rtx
>      switch (addr.type)
>        {
>        case ADDRESS_REG:
> -       riscv_print_operand (file, addr.offset, 0);
> +       output_addr_const (file, riscv_strip_unspec_address (addr.offset));
>         fprintf (file, "(%s)", reg_names[REGNO (addr.reg)]);
>         return;
>
> --
> 2.40.1
>
  

Patch

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 5d2550871c7..92043236b17 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -4581,7 +4581,7 @@  riscv_print_operand_address (FILE *file, machine_mode mode ATTRIBUTE_UNUSED, rtx
     switch (addr.type)
       {
       case ADDRESS_REG:
-	riscv_print_operand (file, addr.offset, 0);
+	output_addr_const (file, riscv_strip_unspec_address (addr.offset));
 	fprintf (file, "(%s)", reg_names[REGNO (addr.reg)]);
 	return;