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Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by AM7EUR03FT060.mail.protection.outlook.com (100.127.140.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6319.20 via Frontend Transport; Tue, 18 Apr 2023 13:47:26 +0000 Received: from AZ-NEU-EX03.Arm.com (10.251.24.31) by AZ-NEU-EX03.Arm.com (10.251.24.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Tue, 18 Apr 2023 13:47:24 +0000 Received: from e129018.arm.com (10.57.54.117) by mail.arm.com (10.251.24.31) with Microsoft SMTP Server id 15.1.2507.23 via Frontend Transport; Tue, 18 Apr 2023 13:47:24 +0000 To: , , , CC: Christophe Lyon Subject: [PATCH 17/22] arm: [MVE intrinsics] rework vcreateq Date: Tue, 18 Apr 2023 15:46:03 +0200 Message-ID: <20230418134608.244751-18-christophe.lyon@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418134608.244751-1-christophe.lyon@arm.com> References: <20230418134608.244751-1-christophe.lyon@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT060:EE_|DBAPR08MB5798:EE_|AM7EUR03FT047:EE_|DU0PR08MB9581:EE_ X-MS-Office365-Filtering-Correlation-Id: f961cfc8-9d1a-4ecf-a22d-08db40137c18 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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(vcreateq): New. * config/arm/arm-mve-builtins-base.def (vcreateq): New. * config/arm/arm-mve-builtins-base.h (vcreateq): New. * config/arm/arm_mve.h (vcreateq_f16): Remove. (vcreateq_f32): Remove. (vcreateq_u8): Remove. (vcreateq_u16): Remove. (vcreateq_u32): Remove. (vcreateq_u64): Remove. (vcreateq_s8): Remove. (vcreateq_s16): Remove. (vcreateq_s32): Remove. (vcreateq_s64): Remove. (__arm_vcreateq_u8): Remove. (__arm_vcreateq_u16): Remove. (__arm_vcreateq_u32): Remove. (__arm_vcreateq_u64): Remove. (__arm_vcreateq_s8): Remove. (__arm_vcreateq_s16): Remove. (__arm_vcreateq_s32): Remove. (__arm_vcreateq_s64): Remove. (__arm_vcreateq_f16): Remove. (__arm_vcreateq_f32): Remove. --- gcc/config/arm/arm-mve-builtins-base.cc | 10 +++ gcc/config/arm/arm-mve-builtins-base.def | 2 + gcc/config/arm/arm-mve-builtins-base.h | 1 + gcc/config/arm/arm_mve.h | 80 ------------------------ 4 files changed, 13 insertions(+), 80 deletions(-) diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc index 499a1ef9f0e..9722c861faf 100644 --- a/gcc/config/arm/arm-mve-builtins-base.cc +++ b/gcc/config/arm/arm-mve-builtins-base.cc @@ -106,8 +106,18 @@ namespace arm_mve { UNSPEC##_M_S, UNSPEC##_M_U, UNSPEC##_M_F, \ UNSPEC##_M_N_S, UNSPEC##_M_N_U, -1)) + /* Helper for builtins without RTX codes, no _m predicated and no _n + overrides. */ +#define FUNCTION_WITHOUT_M_N(NAME, UNSPEC) FUNCTION \ + (NAME, unspec_mve_function_exact_insn, \ + (UNSPEC##_S, UNSPEC##_U, UNSPEC##_F, \ + -1, -1, -1, \ + -1, -1, -1, \ + -1, -1, -1)) + FUNCTION_WITH_RTX_M_N (vaddq, PLUS, VADDQ) FUNCTION_WITH_RTX_M (vandq, AND, VANDQ) +FUNCTION_WITHOUT_M_N (vcreateq, VCREATEQ) FUNCTION_WITH_RTX_M (veorq, XOR, VEORQ) FUNCTION_WITH_RTX_M_N (vmulq, MULT, VMULQ) FUNCTION_WITH_RTX_M_N_NO_N_F (vorrq, IOR, VORRQ) diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def index c3f8c0f0eeb..1bfd15f973c 100644 --- a/gcc/config/arm/arm-mve-builtins-base.def +++ b/gcc/config/arm/arm-mve-builtins-base.def @@ -20,6 +20,7 @@ #define REQUIRES_FLOAT false DEF_MVE_FUNCTION (vaddq, binary_opt_n, all_integer, mx_or_none) DEF_MVE_FUNCTION (vandq, binary, all_integer, mx_or_none) +DEF_MVE_FUNCTION (vcreateq, create, all_integer_with_64, none) DEF_MVE_FUNCTION (veorq, binary, all_integer, mx_or_none) DEF_MVE_FUNCTION (vmulq, binary_opt_n, all_integer, mx_or_none) DEF_MVE_FUNCTION (vorrq, binary_orrq, all_integer, mx_or_none) @@ -31,6 +32,7 @@ DEF_MVE_FUNCTION (vuninitializedq, inherent, all_integer_with_64, none) #define REQUIRES_FLOAT true DEF_MVE_FUNCTION (vaddq, binary_opt_n, all_float, mx_or_none) DEF_MVE_FUNCTION (vandq, binary, all_float, mx_or_none) +DEF_MVE_FUNCTION (vcreateq, create, all_float, none) DEF_MVE_FUNCTION (veorq, binary, all_float, mx_or_none) DEF_MVE_FUNCTION (vmulq, binary_opt_n, all_float, mx_or_none) DEF_MVE_FUNCTION (vorrq, binary_orrq, all_float, mx_or_none) diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h index c450b373239..8dd6bff01bf 100644 --- a/gcc/config/arm/arm-mve-builtins-base.h +++ b/gcc/config/arm/arm-mve-builtins-base.h @@ -25,6 +25,7 @@ namespace functions { extern const function_base *const vaddq; extern const function_base *const vandq; +extern const function_base *const vcreateq; extern const function_base *const veorq; extern const function_base *const vmulq; extern const function_base *const vorrq; diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index edf8e247421..4810e2977d3 100644 --- a/gcc/config/arm/arm_mve.h +++ b/gcc/config/arm/arm_mve.h @@ -638,20 +638,10 @@ #define vcvtq_n_f32_s32(__a, __imm6) __arm_vcvtq_n_f32_s32(__a, __imm6) #define vcvtq_n_f16_u16(__a, __imm6) __arm_vcvtq_n_f16_u16(__a, __imm6) #define vcvtq_n_f32_u32(__a, __imm6) __arm_vcvtq_n_f32_u32(__a, __imm6) -#define vcreateq_f16(__a, __b) __arm_vcreateq_f16(__a, __b) -#define vcreateq_f32(__a, __b) __arm_vcreateq_f32(__a, __b) #define vcvtq_n_s16_f16(__a, __imm6) __arm_vcvtq_n_s16_f16(__a, __imm6) #define vcvtq_n_s32_f32(__a, __imm6) __arm_vcvtq_n_s32_f32(__a, __imm6) #define vcvtq_n_u16_f16(__a, __imm6) __arm_vcvtq_n_u16_f16(__a, __imm6) #define vcvtq_n_u32_f32(__a, __imm6) __arm_vcvtq_n_u32_f32(__a, __imm6) -#define vcreateq_u8(__a, __b) __arm_vcreateq_u8(__a, __b) -#define vcreateq_u16(__a, __b) __arm_vcreateq_u16(__a, __b) -#define vcreateq_u32(__a, __b) __arm_vcreateq_u32(__a, __b) -#define vcreateq_u64(__a, __b) __arm_vcreateq_u64(__a, __b) -#define vcreateq_s8(__a, __b) __arm_vcreateq_s8(__a, __b) -#define vcreateq_s16(__a, __b) __arm_vcreateq_s16(__a, __b) -#define vcreateq_s32(__a, __b) __arm_vcreateq_s32(__a, __b) -#define vcreateq_s64(__a, __b) __arm_vcreateq_s64(__a, __b) #define vshrq_n_s8(__a, __imm) __arm_vshrq_n_s8(__a, __imm) #define vshrq_n_s16(__a, __imm) __arm_vshrq_n_s16(__a, __imm) #define vshrq_n_s32(__a, __imm) __arm_vshrq_n_s32(__a, __imm) @@ -3222,62 +3212,6 @@ __arm_vpnot (mve_pred16_t __a) return __builtin_mve_vpnotv16bi (__a); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_u8 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_uv16qi (__a, __b); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_u16 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_uv8hi (__a, __b); -} - -__extension__ extern __inline uint32x4_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_u32 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_uv4si (__a, __b); -} - -__extension__ extern __inline uint64x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_u64 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_uv2di (__a, __b); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_s8 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_sv16qi (__a, __b); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_s16 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_sv8hi (__a, __b); -} - -__extension__ extern __inline int32x4_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_s32 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_sv4si (__a, __b); -} - -__extension__ extern __inline int64x2_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_s64 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_sv2di (__a, __b); -} - __extension__ extern __inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vshrq_n_s8 (int8x16_t __a, const int __imm) @@ -15580,20 +15514,6 @@ __arm_vcvtq_n_f32_u32 (uint32x4_t __a, const int __imm6) return __builtin_mve_vcvtq_n_to_f_uv4sf (__a, __imm6); } -__extension__ extern __inline float16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_f16 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_fv8hf (__a, __b); -} - -__extension__ extern __inline float32x4_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vcreateq_f32 (uint64_t __a, uint64_t __b) -{ - return __builtin_mve_vcreateq_fv4sf (__a, __b); -} - __extension__ extern __inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vcvtq_n_s16_f16 (float16x8_t __a, const int __imm6)