diff mbox series

RISC-V: Set the ABI for the RVV tests

Message ID 20230413151018.31791-1-palmer@rivosinc.com
State Committed
Commit e6b050da8a4513ab37fd3699c7a963421fbe4d81
Headers
Series RISC-V: Set the ABI for the RVV tests |

Commit Message

Palmer Dabbelt April 13, 2023, 3:10 p.m. UTC 
  The RVV test harness currently sets the ISA according to the target
tuple, but doesn't also set the ABI.  This just sets the ABI to match
the ISA, though we should really also be respecting the user's specific
ISA to test.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/rvv.exp (gcc_mabi): New variable.
---
I've still got some rv32-related multilib failures so there might be
something else going on here, but I think at least this is going to be
necessary.
---
 gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Kito Cheng April 13, 2023, 3:59 p.m. UTC | #1 
Ok, thanks :)

Palmer Dabbelt <palmer@rivosinc.com>於 2023年4月13日 週四，23:12寫道：

> The RVV test harness currently sets the ISA according to the target
> tuple, but doesn't also set the ABI.  This just sets the ABI to match
> the ISA, though we should really also be respecting the user's specific
> ISA to test.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/rvv/rvv.exp (gcc_mabi): New variable.
> ---
> I've still got some rv32-related multilib failures so there might be
> something else going on here, but I think at least this is going to be
> necessary.
> ---
>  gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
> b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
> index 7a9a2b6ac48..4b5509db385 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
> @@ -31,15 +31,17 @@ if ![info exists DEFAULT_CFLAGS] then {
>  }
>
>  set gcc_march "rv64gcv_zfh"
> +set gcc_mabi  "lp64d"
>  if [istarget riscv32-*-*] then {
>    set gcc_march "rv32gcv_zfh"
> +  set gcc_mabi  "ilp32d"
>  }
>
>  # Initialize `dg'.
>  dg-init
>
>  # Main loop.
> -set CFLAGS "$DEFAULT_CFLAGS -march=$gcc_march -O3"
> +set CFLAGS "$DEFAULT_CFLAGS -march=$gcc_march -mabi=$gcc_mabi -O3"
>  dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/base/*.\[cS\]]] \
>         "" $CFLAGS
>  gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vsetvl/*.\[cS\]]]
> \
> --
> 2.39.2
>
>
Palmer Dabbelt April 17, 2023, 7:19 p.m. UTC | #2 
On Thu, 13 Apr 2023 08:59:58 PDT (-0700), gcc-patches@gcc.gnu.org wrote:
> Ok, thanks :)

Committed.

>
> Palmer Dabbelt <palmer@rivosinc.com>於 2023年4月13日 週四，23:12寫道：
>
>> The RVV test harness currently sets the ISA according to the target
>> tuple, but doesn't also set the ABI.  This just sets the ABI to match
>> the ISA, though we should really also be respecting the user's specific
>> ISA to test.
>>
>> gcc/testsuite/ChangeLog:
>>
>>         * gcc.target/riscv/rvv/rvv.exp (gcc_mabi): New variable.
>> ---
>> I've still got some rv32-related multilib failures so there might be
>> something else going on here, but I think at least this is going to be
>> necessary.
>> ---
>>  gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 4 +++-
>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
>> b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
>> index 7a9a2b6ac48..4b5509db385 100644
>> --- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
>> +++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
>> @@ -31,15 +31,17 @@ if ![info exists DEFAULT_CFLAGS] then {
>>  }
>>
>>  set gcc_march "rv64gcv_zfh"
>> +set gcc_mabi  "lp64d"
>>  if [istarget riscv32-*-*] then {
>>    set gcc_march "rv32gcv_zfh"
>> +  set gcc_mabi  "ilp32d"
>>  }
>>
>>  # Initialize `dg'.
>>  dg-init
>>
>>  # Main loop.
>> -set CFLAGS "$DEFAULT_CFLAGS -march=$gcc_march -O3"
>> +set CFLAGS "$DEFAULT_CFLAGS -march=$gcc_march -mabi=$gcc_mabi -O3"
>>  dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/base/*.\[cS\]]] \
>>         "" $CFLAGS
>>  gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vsetvl/*.\[cS\]]]
>> \
>> --
>> 2.39.2
>>
>>
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
index 7a9a2b6ac48..4b5509db385 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
+++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
@@ -31,15 +31,17 @@  if ![info exists DEFAULT_CFLAGS] then {
 }
 
 set gcc_march "rv64gcv_zfh"
+set gcc_mabi  "lp64d"
 if [istarget riscv32-*-*] then {
   set gcc_march "rv32gcv_zfh"
+  set gcc_mabi  "ilp32d"
 }
 
 # Initialize `dg'.
 dg-init
 
 # Main loop.
-set CFLAGS "$DEFAULT_CFLAGS -march=$gcc_march -O3"
+set CFLAGS "$DEFAULT_CFLAGS -march=$gcc_march -mabi=$gcc_mabi -O3"
 dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/base/*.\[cS\]]] \
 	"" $CFLAGS
 gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vsetvl/*.\[cS\]]] \