Document signbitm2.

Message ID 20230331065810.4012545-1-hongtao.liu@intel.com
State Committed
Commit b551ea379947c640358c9f20f71c5c6237d85d0f
Headers
Series Document signbitm2. |

Commit Message

Liu, Hongtao March 31, 2023, 6:58 a.m. UTC
  Look through all backends which defined signbitm2.
1. When m is a scalar mode, the dest is SImode.
2. When m is a vector mode, the dest mode is the vector integer
mode has the same size and elements number as m.

Ok for trunk?

gcc/ChangeLog:

	* doc/md.texi: Document signbitm2.
---
 gcc/doc/md.texi | 11 +++++++++++
 1 file changed, 11 insertions(+)
  

Comments

Richard Biener March 31, 2023, 8:51 a.m. UTC | #1
On Fri, Mar 31, 2023 at 8:59 AM liuhongt via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Look through all backends which defined signbitm2.
> 1. When m is a scalar mode, the dest is SImode.
> 2. When m is a vector mode, the dest mode is the vector integer
> mode has the same size and elements number as m.
>
> Ok for trunk?

OK.

> gcc/ChangeLog:
>
>         * doc/md.texi: Document signbitm2.
> ---
>  gcc/doc/md.texi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
> index 8e3113599fd..edfa51e867a 100644
> --- a/gcc/doc/md.texi
> +++ b/gcc/doc/md.texi
> @@ -6030,6 +6030,17 @@ floating-point mode.
>
>  This pattern is not allowed to @code{FAIL}.
>
> +@cindex @code{signbit@var{m}2} instruction pattern
> +@item @samp{signbit@var{m}2}
> +Store the sign bit of floating-point operand 1 in operand 0.
> +@var{m} is either a scalar or vector mode.  When it is a scalar,
> +operand 1 has mode @var{m} but operand 0 must have mode @code{SImode}.
> +When @var{m} is a vector, operand 1 has the mode @var{m}.
> +operand 0's mode should be an vector integer mode which has
> +the same number of elements and the same size as mode @var{m}.
> +
> +This pattern is not allowed to @code{FAIL}.
> +
>  @cindex @code{significand@var{m}2} instruction pattern
>  @item @samp{significand@var{m}2}
>  Store the significand of floating-point operand 1 in operand 0.
> --
> 2.39.1.388.g2fc9e9ca3c
>
  

Patch

diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 8e3113599fd..edfa51e867a 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -6030,6 +6030,17 @@  floating-point mode.
 
 This pattern is not allowed to @code{FAIL}.
 
+@cindex @code{signbit@var{m}2} instruction pattern
+@item @samp{signbit@var{m}2}
+Store the sign bit of floating-point operand 1 in operand 0.
+@var{m} is either a scalar or vector mode.  When it is a scalar,
+operand 1 has mode @var{m} but operand 0 must have mode @code{SImode}.
+When @var{m} is a vector, operand 1 has the mode @var{m}.
+operand 0's mode should be an vector integer mode which has
+the same number of elements and the same size as mode @var{m}.
+
+This pattern is not allowed to @code{FAIL}.
+
 @cindex @code{significand@var{m}2} instruction pattern
 @item @samp{significand@var{m}2}
 Store the significand of floating-point operand 1 in operand 0.