From patchwork Mon Mar 13 03:52:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cheng X-Patchwork-Id: 66284 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 148873858280 for ; Mon, 13 Mar 2023 03:53:35 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 65A9B3858D32 for ; Mon, 13 Mar 2023 03:53:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 65A9B3858D32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.5]) by gateway (Coremail) with SMTP id _____8Dx_5cqng5k0M0LAA--.16569S3; Mon, 13 Mar 2023 11:53:14 +0800 (CST) Received: from 5.5.5 (unknown [10.2.5.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxnb4lng5kidpVAA--.21877S2; Mon, 13 Mar 2023 11:53:13 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, Lulu Cheng Subject: [PATCH] LoongArch: Control all __crc* __crcc* builtin functions with macro __loongarch64. Date: Mon, 13 Mar 2023 11:52:50 +0800 Message-Id: <20230313035249.3997637-1-chenglulu@loongson.cn> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxnb4lng5kidpVAA--.21877S2 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBjvJXoWxWr4fuFyDGry3tr4UCr43Awb_yoW5XF1DpF Z7Aw13tr48Jrs2gFyDJ34DWrnxtr47Xr42qa45tw1xC3WUW34IqF40yr9FvFyDWw4Yv3yS qa1fK3yDuF4UAw7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b7AYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_JrI_Jryl8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVWUCVW8JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4xG64xvF2 IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4U McvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwIxGrwCFx2 IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v2 6r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67 AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IY s7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Jr 0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU8czVUUUUUU== X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" LoongArch 32-bit instruction set does not support crc* and crcc* instructions. gcc/ChangeLog: * config/loongarch/larchintrin.h (__crc_w_b_w): Add macros for control. (__crc_w_h_w): Likewise. (__crc_w_w_w): Likewise. (__crcc_w_b_w): Likewise. (__crcc_w_h_w): Likewise. (__crcc_w_w_w): Likewise. * config/loongarch/loongarch.md: Add condition TARGET_64BIT to loongarch_crc_* loongarch_crcc_* instruction template. --- gcc/config/loongarch/larchintrin.h | 4 +--- gcc/config/loongarch/loongarch.md | 4 ++-- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/gcc/config/loongarch/larchintrin.h b/gcc/config/loongarch/larchintrin.h index e571ed27b37..09f9a5db846 100644 --- a/gcc/config/loongarch/larchintrin.h +++ b/gcc/config/loongarch/larchintrin.h @@ -145,6 +145,7 @@ __asrtgt_d (long int _1, long int _2) #error "Unsupported ABI." #endif +#ifdef __loongarch64 /* Assembly instruction format: rd, rj, rk. */ /* Data types in instruction templates: SI, QI, SI. */ extern __inline int @@ -172,7 +173,6 @@ __crc_w_w_w (int _1, int _2) return (int) __builtin_loongarch_crc_w_w_w ((int) _1, (int) _2); } -#ifdef __loongarch64 /* Assembly instruction format: rd, rj, rk. */ /* Data types in instruction templates: SI, DI, SI. */ extern __inline int @@ -181,7 +181,6 @@ __crc_w_d_w (long int _1, int _2) { return (int) __builtin_loongarch_crc_w_d_w ((long int) _1, (int) _2); } -#endif /* Assembly instruction format: rd, rj, rk. */ /* Data types in instruction templates: SI, QI, SI. */ @@ -210,7 +209,6 @@ __crcc_w_w_w (int _1, int _2) return (int) __builtin_loongarch_crcc_w_w_w ((int) _1, (int) _2); } -#ifdef __loongarch64 /* Assembly instruction format: rd, rj, rk. */ /* Data types in instruction templates: SI, DI, SI. */ extern __inline int diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 3509c3c21c1..227f3c6899c 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -3539,7 +3539,7 @@ (define_insn "loongarch_crc_w__w" (unspec:SI [(match_operand:QHSD 1 "register_operand" "r") (match_operand:SI 2 "register_operand" "r")] UNSPEC_CRC))] - "" + "TARGET_64BIT" "crc.w..w\t%0,%1,%2" [(set_attr "type" "unknown") (set_attr "mode" "")]) @@ -3549,7 +3549,7 @@ (define_insn "loongarch_crcc_w__w" (unspec:SI [(match_operand:QHSD 1 "register_operand" "r") (match_operand:SI 2 "register_operand" "r")] UNSPEC_CRCC))] - "" + "TARGET_64BIT" "crcc.w..w\t%0,%1,%2" [(set_attr "type" "unknown") (set_attr "mode" "")])