From patchwork Sat Feb 4 01:09:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 64293 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DBEE6385802F for ; Sat, 4 Feb 2023 01:10:00 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbguseast2.qq.com (smtpbguseast2.qq.com [54.204.34.130]) by sourceware.org (Postfix) with ESMTPS id 7AECD3858C52 for ; Sat, 4 Feb 2023 01:09:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7AECD3858C52 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp88t1675472973tz67vq9s Received: from server1.localdomain ( [58.60.1.22]) by bizesmtp.qq.com (ESMTP) with id ; Sat, 04 Feb 2023 09:09:32 +0800 (CST) X-QQ-SSF: 01400000000000E0L000000A0000000 X-QQ-FEAT: wF64VgvUy+VqdiLoxHGm7P/PVoi9jCpI2bcJayfCVpY3Nh6qJq28kSkkTnFja mi5OzLSc3TPy8IV95vVpF+PC2gszPEgop3fBOx0w6YRpsXbIPFw2Btg2spEeoklJPW6kKlg d6dP9N9iALTMAhwzfg3Ojdmq0dP5Nb+MkJIFCAxeDZaqhgeNNNE/W1EtjKO0uTyVn8rfWb9 tpMzsJN5vtDBNEXLGL4hBEKcvtn6uxwD719a5tjvESK7UkIkhggPdzfOLgEOH7rhXuDf98R JNqqWJhBdYUcmfS7S+bxhXSCkKt72bOViNg9xbqzTl9MHF13k6zNIOgWoTehLU7zreYHhO6 BkoiKo3imyH1sFPtWqgd/Zj9Ijpi5pFb5JhZ+sr/gWD9DYTgjBEiTFq7kNetg== X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Fix VSETVL PASS bug in exception handling Date: Sat, 4 Feb 2023 09:09:30 +0800 Message-Id: <20230204010930.263271-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block. gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/exception-1.C: New test. --- gcc/config/riscv/riscv-vsetvl.cc | 10 +++++-- .../g++.target/riscv/rvv/base/exception-1.C | 29 +++++++++++++++++++ 2 files changed, 36 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/exception-1.C diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index ef5b74c58d2..8e6063ae83b 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -3492,8 +3492,15 @@ pass_vsetvl::compute_probabilities (void) basic_block cfg_bb = bb->cfg_bb (); auto &curr_prob = m_vector_manager->vector_block_infos[cfg_bb->index].probability; + + /* GCC assume entry block (bb 0) are always so + executed so set its probability as "always". */ if (ENTRY_BLOCK_PTR_FOR_FN (cfun) == cfg_bb) curr_prob = profile_probability::always (); + /* Exit block (bb 1) is the block we don't need to process. */ + if (EXIT_BLOCK_PTR_FOR_FN (cfun) == cfg_bb) + continue; + gcc_assert (curr_prob.initialized_p ()); FOR_EACH_EDGE (e, ei, cfg_bb->succs) { @@ -3507,9 +3514,6 @@ pass_vsetvl::compute_probabilities (void) new_prob += curr_prob * e->probability; } } - auto &exit_block - = m_vector_manager->vector_block_infos[EXIT_BLOCK_PTR_FOR_FN (cfun)->index]; - exit_block.probability = profile_probability::always (); } /* Lazy vsetvl insertion for optimize > 0. */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/exception-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/exception-1.C new file mode 100644 index 00000000000..5f5247bce46 --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/base/exception-1.C @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64 -O3" } */ + +#include +#include "riscv_vector.h" +#include +void __attribute__((noinline)) foo(int arr[4]) { +printf("%d %d %d %d\n", arr[0], arr[1], arr[2], arr[3]); +} + +void __attribute__((noinline)) test() { +// Intialization with 2 memsets leads to spilling of zero-splat value +vint32m1_t a; +int arr1[4] = {}; +foo(arr1); +int arr2[4] = {}; +foo(arr2); +asm volatile ("# %0" : "+vr" (a)); +throw int(); +} + +int main() { +try { + test(); +} catch (...) { + printf("hello\n"); +}; +return 0; +}