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Fri, 3 Feb 2023 10:22:13 GMT Received: from smtprelay07.fra02v.mail.ibm.com ([9.218.2.229]) by ppma04ams.nl.ibm.com (PPS) with ESMTPS id 3ncvs7qarf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 03 Feb 2023 10:22:13 +0000 Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay07.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 313AMBNC52101596 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 3 Feb 2023 10:22:11 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 717012004B; Fri, 3 Feb 2023 10:22:11 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5822C2006A; Fri, 3 Feb 2023 10:22:10 +0000 (GMT) Received: from pike.rch.stglabs.ibm.com (unknown [9.5.12.127]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 3 Feb 2023 10:22:10 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, guojiufu@linux.ibm.com Subject: [PATCH 1/4] rs6000: build constant via li;rotldi Date: Fri, 3 Feb 2023 18:22:05 +0800 Message-Id: <20230203102208.53215-2-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230203102208.53215-1-guojiufu@linux.ibm.com> References: <20230203102208.53215-1-guojiufu@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: nV4wvuBkKPzR-OjRow_z_bP_bMqXh3ey X-Proofpoint-ORIG-GUID: 6H9CELyGBjglbnJk3OT5RibFmh93gv8y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-03_06,2023-02-03_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 malwarescore=0 spamscore=0 clxscore=1015 mlxlogscore=999 adultscore=0 bulkscore=0 mlxscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302030093 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jiufu Guo via Gcc-patches From: Jiufu Guo Reply-To: Jiufu Guo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch checks if a constant is possible to be rotated to/from a positive or negative value from "li". If so, we could use "li;rotldi" to build it. Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk or next stage1? BR, Jeff (Jiufu) gcc/ChangeLog: * config/rs6000/rs6000.cc (can_be_rotated_to_possitive_li): New function. (can_be_rotated_to_negative_li): New function. (can_be_built_by_li_and_rotldi): New function. (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi. gcc/testsuite/ChangeLog: * gcc.target/powerpc/const-build.c: New test. --- gcc/config/rs6000/rs6000.cc | 63 +++++++++++++++++-- .../gcc.target/powerpc/const-build.c | 54 ++++++++++++++++ 2 files changed, 111 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/const-build.c diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 6ac3adcec6b..82aba051c55 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10238,6 +10238,45 @@ rs6000_emit_set_const (rtx dest, rtx source) return true; } +/* Check if C can be rotated to a possitive value which 'li' instruction + is able to load. If so, set *ROT to the number by which C is rotated, + and return true. Return false otherwise. */ +static bool +can_be_rotated_to_possitive_li (HOST_WIDE_INT c, int *rot) +{ + /* 49 leading zeros and 15 lowbits on the possitive value + generated by 'li' instruction. */ + return can_be_rotated_to_lowbits (c, 15, rot); +} + +/* Like can_be_rotated_to_possitive_li, but check negative value of 'li'. */ +static bool +can_be_rotated_to_negative_li (HOST_WIDE_INT c, int *rot) +{ + return can_be_rotated_to_lowbits (~c, 15, rot); +} + +/* Check if value C can be built by 2 instructions: one is 'li', another is + rotldi. + + If so, *SHIFT is set to the shift operand of rotldi(rldicl), and *MASK + is set to -1, and return true. Return false otherwise. */ +static bool +can_be_built_by_li_and_rotldi (HOST_WIDE_INT c, int *shift, + HOST_WIDE_INT *mask) +{ + int n; + if (can_be_rotated_to_possitive_li (c, &n) + || can_be_rotated_to_negative_li (c, &n)) + { + *mask = HOST_WIDE_INT_M1; + *shift = HOST_BITS_PER_WIDE_INT - n; + return true; + } + + return false; +} + /* Subroutine of rs6000_emit_set_const, handling PowerPC64 DImode. Output insns to set DEST equal to the constant C as a series of lis, ori and shl instructions. */ @@ -10246,15 +10285,14 @@ static void rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) { rtx temp; + int shift; + HOST_WIDE_INT mask; HOST_WIDE_INT ud1, ud2, ud3, ud4; ud1 = c & 0xffff; - c = c >> 16; - ud2 = c & 0xffff; - c = c >> 16; - ud3 = c & 0xffff; - c = c >> 16; - ud4 = c & 0xffff; + ud2 = (c >> 16) & 0xffff; + ud3 = (c >> 32) & 0xffff; + ud4 = (c >> 48) & 0xffff; if ((ud4 == 0xffff && ud3 == 0xffff && ud2 == 0xffff && (ud1 & 0x8000)) || (ud4 == 0 && ud3 == 0 && ud2 == 0 && ! (ud1 & 0x8000))) @@ -10278,6 +10316,19 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) emit_move_insn (dest, gen_rtx_XOR (DImode, temp, GEN_INT ((ud2 ^ 0xffff) << 16))); } + else if (can_be_built_by_li_and_rotldi (c, &shift, &mask)) + { + temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); + unsigned HOST_WIDE_INT imm = (c | ~mask); + imm = (imm >> shift) | (imm << (HOST_BITS_PER_WIDE_INT - shift)); + + emit_move_insn (temp, GEN_INT (imm)); + if (shift != 0) + temp = gen_rtx_ROTATE (DImode, temp, GEN_INT (shift)); + if (mask != HOST_WIDE_INT_M1) + temp = gen_rtx_AND (DImode, temp, GEN_INT (mask)); + emit_move_insn (dest, temp); + } else if (ud3 == 0 && ud4 == 0) { temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); diff --git a/gcc/testsuite/gcc.target/powerpc/const-build.c b/gcc/testsuite/gcc.target/powerpc/const-build.c new file mode 100644 index 00000000000..70f095f6bf2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/const-build.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -save-temps" } */ +/* { dg-require-effective-target has_arch_ppc64 } */ + +#define NOIPA __attribute__ ((noipa)) + +struct fun +{ + long long (*f) (void); + long long val; +}; + +long long NOIPA +li_rotldi_1 (void) +{ + return 0x7531000000000LL; +} + +long long NOIPA +li_rotldi_2 (void) +{ + return 0x2100000000000064LL; +} + +long long NOIPA +li_rotldi_3 (void) +{ + return 0xffff8531ffffffffLL; +} + +long long NOIPA +li_rotldi_4 (void) +{ + return 0x21ffffffffffff94LL; +} + +struct fun arr[] = { + {li_rotldi_1, 0x7531000000000LL}, + {li_rotldi_2, 0x2100000000000064LL}, + {li_rotldi_3, 0xffff8531ffffffffLL}, + {li_rotldi_4, 0x21ffffffffffff94LL}, +}; + +/* { dg-final { scan-assembler-times {\mrotldi\M} 4 } } */ + +int +main () +{ + for (int i = 0; i < sizeof (arr) / sizeof (arr[0]); i++) + if ((*arr[i].f) () != arr[i].val) + __builtin_abort (); + + return 0; +}