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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT041.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB6294 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrea Corallo via Gcc-patches From: Andrea Corallo Reply-To: Andrea Corallo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vcmlaq_f16.c: Improve test. * gcc.target/arm/mve/intrinsics/vcmlaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c: Likewise. --- .../arm/mve/intrinsics/vcmlaq_f16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vcmlaq_f32.c | 24 +++++++++++-- .../arm/mve/intrinsics/vcmlaq_m_f16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vcmlaq_m_f32.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vcmlaq_rot180_f16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vcmlaq_rot180_f32.c | 24 +++++++++++-- .../arm/mve/intrinsics/vcmlaq_rot180_m_f16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vcmlaq_rot180_m_f32.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vcmlaq_rot270_f16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vcmlaq_rot270_f32.c | 24 +++++++++++-- .../arm/mve/intrinsics/vcmlaq_rot270_m_f16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vcmlaq_rot270_m_f32.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vcmlaq_rot90_f16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vcmlaq_rot90_f32.c | 24 +++++++++++-- .../arm/mve/intrinsics/vcmlaq_rot90_m_f16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vcmlaq_rot90_m_f32.c | 34 ++++++++++++++++--- 16 files changed, 416 insertions(+), 48 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c index fa7d0c05e8c..bb8a99790a0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, float16x8_t c) { return vcmlaq_f16 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f16" } } */ +/* +**foo1: +** ... +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, float16x8_t c) { return vcmlaq (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c index 166bf421f14..71ec4b8479c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, float32x4_t c) { return vcmlaq_f32 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f32" } } */ +/* +**foo1: +** ... +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, float32x4_t c) { return vcmlaq (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c index 0929f5a0a89..3db345d0791 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) { return vcmlaq_m_f16 (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) { return vcmlaq_m (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c index 1f4ba453cbc..dcbd2dccce5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) { return vcmlaq_m_f32 (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) { return vcmlaq_m (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c index fc6ba30b36a..f76ae2383a2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, float16x8_t c) { return vcmlaq_rot180_f16 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f16" } } */ +/* +**foo1: +** ... +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, float16x8_t c) { return vcmlaq_rot180 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c index dbe3f26b3b9..c97d0d0d852 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, float32x4_t c) { return vcmlaq_rot180_f32 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f32" } } */ +/* +**foo1: +** ... +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, float32x4_t c) { return vcmlaq_rot180 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c index 84a3bd81ad9..132cdf9954f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) { return vcmlaq_rot180_m_f16 (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) { return vcmlaq_rot180_m (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c index 61f5716f0b7..99e96ebe3a9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) { return vcmlaq_rot180_m_f32 (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) { return vcmlaq_rot180_m (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c index 1b0bef91f37..fae85105feb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, float16x8_t c) { return vcmlaq_rot270_f16 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f16" } } */ +/* +**foo1: +** ... +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, float16x8_t c) { return vcmlaq_rot270 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c index 83e15025e44..54a9b662772 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, float32x4_t c) { return vcmlaq_rot270_f32 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f32" } } */ +/* +**foo1: +** ... +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, float32x4_t c) { return vcmlaq_rot270 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c index 6e033b1d7ab..e34f83165c3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) { return vcmlaq_rot270_m_f16 (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) { return vcmlaq_rot270_m (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c index 4928341076d..cdba91b8e8c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) { return vcmlaq_rot270_m_f32 (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) { return vcmlaq_rot270_m (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c index 16744a4582c..f767b2b6e6b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, float16x8_t c) { return vcmlaq_rot90_f16 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f16" } } */ +/* +**foo1: +** ... +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, float16x8_t c) { return vcmlaq_rot90 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c index f1f19a87ba7..6c9b24f271d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, float32x4_t c) { return vcmlaq_rot90_f32 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f32" } } */ +/* +**foo1: +** ... +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, float32x4_t c) { return vcmlaq_rot90 (a, b, c); } -/* { dg-final { scan-assembler "vcmla.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c index 7133ddc7ad5..9141c9e6f90 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) { return vcmlaq_rot90_m_f16 (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) { return vcmlaq_rot90_m (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c index 6022e3be538..f317d411806 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) { return vcmlaq_rot90_m_f32 (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) { return vcmlaq_rot90_m (a, b, c, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmlat.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file