From patchwork Fri Jan 20 16:39:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrea Corallo X-Patchwork-Id: 63467 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8B2ED389851A for ; Fri, 20 Jan 2023 16:42:53 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8B2ED389851A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1674232973; bh=uUvBR8xeBKtZnIFtZ5dUpVuGomv91rnpkWjh9rgl6Og=; h=To:CC:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=S2FrgNtEel4jO0FJ8z7dKY+up4uk1ALU7HACC7oZG/hdKkqWKClHZ0tUxj1KZn8WY SILN0d2f+QAZqwk72lNYEi187Q3TKXZTbql4GOgp4kalnv9GQYzqhX7MJKswZV2uaC UQH1cOM3gGyIRLqsrETKtTAHtxj0ecvAiTOQweGU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from EUR04-VI1-obe.outbound.protection.outlook.com (mail-vi1eur04on2043.outbound.protection.outlook.com [40.107.8.43]) by sourceware.org (Postfix) with ESMTPS id 622503858024 for ; Fri, 20 Jan 2023 16:40:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 622503858024 Received: from DU2PR04CA0284.eurprd04.prod.outlook.com (2603:10a6:10:28c::19) by GV2PR08MB8320.eurprd08.prod.outlook.com (2603:10a6:150:b5::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.25; Fri, 20 Jan 2023 16:40:45 +0000 Received: from DBAEUR03FT041.eop-EUR03.prod.protection.outlook.com (2603:10a6:10:28c:cafe::d2) by DU2PR04CA0284.outlook.office365.com (2603:10a6:10:28c::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.27 via Frontend Transport; Fri, 20 Jan 2023 16:40:45 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by DBAEUR03FT041.mail.protection.outlook.com (100.127.142.233) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6023.16 via Frontend Transport; Fri, 20 Jan 2023 16:40:45 +0000 Received: ("Tessian outbound 333ca28169fa:v132"); Fri, 20 Jan 2023 16:40:45 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 1918287af01ea1cd X-CR-MTA-TID: 64aa7808 Received: from 122ccf7863fe.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 478CC063-8510-4234-BF11-0EE0FAE80CAC.1; Fri, 20 Jan 2023 16:40:38 +0000 Received: from EUR01-VE1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 122ccf7863fe.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Fri, 20 Jan 2023 16:40:38 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ESG90rm34otFyVn35+XZlaxgf2Eul7QR0ynym2qw17EnXPaRnchZYvcb7wKBjGUzQ/MtDEH+iWmKHubfaVHOqe1+S44KEbRxWtzubnNJ/ue/GycgraMmRoCnJ6Wk5Zw5Rs6oNrcTHYjTge4iOFQncW2mTehoLt7FsPvfrTtvrBO2fkbxQznM1lnoeIqc+iTAxZ7djzSdjjJ7aEJ6zFXKBlG+rFEFkDBbUuaDyO/sh17Ft+TlU/qOiBjSLFSNBc9285SyTEE6DkFXQ6bjyw1hR4ogK07VK3p38v8qNK7IQm1TAJeng1kGw0pklUQ2kpyDIuAmGP+3Avw7i+Q0uQWeog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=uUvBR8xeBKtZnIFtZ5dUpVuGomv91rnpkWjh9rgl6Og=; b=bBwbJbl27AvMuNe2wZFLFmz4S9TI8gIhzeQbAtSyenCJ15DJJUpw3uvVwm9FtDpOEb5sZRJqjddU/6TvKfVjdtvfIhf+X+m00+K6V2txE1afDr7R3UqUfA+D24mPOeY1zS2fY3+tfz+1uDjU/YJ2K67YFh3EStMFi7SF82sXiWrOh+iWu5jefxhqjiwsKqaHJt14ol2sm+RuIKVeFd+OUEzvPCA9i1TIVEzGLjL4Uzl3GA6De+5VYWRDbzYfIz3gYADN50RTUOhj9aHeyjl1+5XnZSSWB6sAyekj14PbhM1qaaLL9NA/BgLIyGdxOMMfZPNjLMn6QWeowTfwWAAMZQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=gcc.gnu.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none Received: from AM6P193CA0103.EURP193.PROD.OUTLOOK.COM (2603:10a6:209:88::44) by GV1PR08MB7852.eurprd08.prod.outlook.com (2603:10a6:150:5f::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.25; Fri, 20 Jan 2023 16:40:35 +0000 Received: from AM7EUR03FT030.eop-EUR03.prod.protection.outlook.com (2603:10a6:209:88:cafe::bf) by AM6P193CA0103.outlook.office365.com (2603:10a6:209:88::44) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.27 via Frontend Transport; Fri, 20 Jan 2023 16:40:35 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by AM7EUR03FT030.mail.protection.outlook.com (100.127.140.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6023.16 via Frontend Transport; Fri, 20 Jan 2023 16:40:34 +0000 Received: from AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 20 Jan 2023 16:40:22 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 20 Jan 2023 16:40:22 +0000 Received: from e124257.nice.arm.com (10.34.105.24) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Fri, 20 Jan 2023 16:40:22 +0000 To: CC: , , Andrea Corallo Subject: [PATCH 05/23] arm: improve tests for vmullbq* Date: Fri, 20 Jan 2023 17:39:30 +0100 Message-ID: <20230120163948.752531-6-andrea.corallo@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230120163948.752531-1-andrea.corallo@arm.com> References: <20230120163948.752531-1-andrea.corallo@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT030:EE_|GV1PR08MB7852:EE_|DBAEUR03FT041:EE_|GV2PR08MB8320:EE_ X-MS-Office365-Filtering-Correlation-Id: 25ba6bbd-9b82-4f7b-858b-08dafb0513ef x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: /52P3RnwwAVYDh5DsOvhlQS006n1xxsOtypIqANcJ0MAtUztjEdN5nOzL+uYpXMkS//uqPSNqSMKb0S280V59lRJBEWDrWVxSGjrGr7Ksah2LZiNTnDBib6J2Ut2bgDTgfsx3gE810j2sEJ8RNFqSgDG8s8h5ExxgkH3rZi9os8A8QLqqFimR26HjSD5YZZRTSCXISAWOC2RowYk16IIRbuL9nMBR23Ep0PvxT63cNmXk13JkREBfVAtxf13JnnqZ7Aw6ByPmzMe3ZbhdiPSEOq9W28MxAs7kTK+Boy6InbiTgHzCEM1VGQZ4TOoRpIqy2K6DEDwEXMcEWemY11ipC5o24QLe1tGjh9dowJJEr4zKnIfmrNTXE6Ls/44HyDPcGoj56BQr/in2Vqukw37dNveFKcdx394C6n+1vtujApbnrNBWcHaF2i0ZsMdwhAJx5m+J4MY0Q8LtVKD1CtHBd8f1u9RuLB4U99z3TH923eSS0+2vfRAi1mGu5QeHpsJyDWtLZypHpt2/PHBuPBXjYQBzBrcR1aXt8qvzeswnsvZwDWvZbV+U1enu0zL81UjN3ccr7bZFTa1RVTlgciNQCeRgLBSYZ+gpYmhVpp2EzD89ODwFW/pRqDCK19OTdjtH/AveXvwbNzHc6+tloozYL9UyT0v2Cc2TJ2caZbfiouYBJyOEWQFqr42kU7cnaXIf/jojMQDQnEryJhXZdIIoQF390XxaFNgr+/Y/dWiLksbNzU8i3Nviy7rIZjYYBIo7RqJpLyvxTzF+/pVbt5UNXws+Cq6znMUR1fmoaru+whgyopAJr3m4QPTJJSfVpFY X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:nebula.arm.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230022)(4636009)(396003)(346002)(136003)(376002)(39860400002)(451199015)(36840700001)(46966006)(40470700004)(84970400001)(81166007)(36860700001)(2906002)(82740400003)(36756003)(40460700003)(426003)(47076005)(4326008)(40480700001)(2616005)(7696005)(316002)(86362001)(82310400005)(54906003)(356005)(8676002)(70586007)(6916009)(30864003)(44832011)(41300700001)(336012)(5660300002)(6666004)(1076003)(70206006)(83380400001)(186003)(8936002)(26005)(478600001)(36900700001); DIR:OUT; SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB7852 X-MS-Exchange-Transport-CrossTenantHeadersStripped: DBAEUR03FT041.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: df465300-e9b2-4166-5d90-08dafb050dbf X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: QIt+uknYeUK2arlaX8+fS/QW049uNoN4ddlXofACp4WXkcIT7md+VUEWAjGLl8NuE3b0HzpaZalXPgl9aJ6VGSfncgHvMANFRbH6MhqaY/E9+GYjsuhz0HHQ+iA6nCa6uzZ+W/HrjNUlU7cr5Ed7liDhPCUGqnPaX6M1itHq1h19QqZOulf0jTlDNg9TpzoKWkM0v2S4Ze1cw/cI7Vykahpgfcae/VTFp/kxRnCPsd+aOyp+Jcdpq4Jqk+mUiOX3IIn85F3mfSWu7G7HOP0LiEh9Oxb07ThOxPN4lLD9vAXILX61HQ0bOvIqO3h+cFOTTMqV9JKK5hlJltLkpSkPo7bXWArtCyGvtUbR2jKOyloBnAjvwxMNG5naYYPNBNxjEE8JsuLoX6oysfbEy7XAUofuW7gW3pYJyPU6E8bYWL6GYFY/Bmn583ojofkEIXNFksAFx6BFB7VVNfjHI1vhuYDgR6ggoFQzrGWh1hW4urx3HkjXJwdtsIzYz/cZRI95d1VlTjhN4DHciGr5MT0dS15E0kn9twfMDBZFMqHwl7wlkof6YmdlJ/4VtxKZ0qlKVD0REtu/k1CflhKaZ52qehr9uS3xBcb28duTyKygbd27J3pflA9KoufrV1UYDe8WhPDd1tJB5X3tGiX1FztMko1yN/pMNZg+Pj6p9ewGszf/VJCYIsdmnodgjKEFpQeMnsmUGVHZhFto4cE9W86+xoclEDivpJSN/d8PqZ2uRgUIgi8snbwBYTNY1QceahuyTiiofZkpLRd9/IxC8SiEiA== X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230022)(4636009)(346002)(136003)(39860400002)(396003)(376002)(451199015)(36840700001)(40470700004)(46966006)(5660300002)(8936002)(83380400001)(2906002)(44832011)(30864003)(70586007)(426003)(47076005)(41300700001)(82310400005)(81166007)(86362001)(36756003)(40480700001)(4326008)(6916009)(36860700001)(82740400003)(54906003)(7696005)(2616005)(6666004)(186003)(84970400001)(478600001)(26005)(70206006)(40460700003)(316002)(1076003)(336012)(8676002); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jan 2023 16:40:45.4062 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 25ba6bbd-9b82-4f7b-858b-08dafb0513ef X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT041.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV2PR08MB8320 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrea Corallo via Gcc-patches From: Andrea Corallo Reply-To: Andrea Corallo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c: Improve test. * gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c: Likewise. --- .../arm/mve/intrinsics/vmullbq_int_m_s16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmullbq_int_m_s32.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmullbq_int_m_s8.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmullbq_int_m_u16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmullbq_int_m_u32.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmullbq_int_m_u8.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmullbq_int_s16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmullbq_int_s32.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmullbq_int_s8.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmullbq_int_u16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmullbq_int_u32.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmullbq_int_u8.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmullbq_int_x_s16.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmullbq_int_x_s32.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmullbq_int_x_s8.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmullbq_int_x_u16.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmullbq_int_x_u32.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmullbq_int_x_u8.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmullbq_poly_m_p16.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmullbq_poly_m_p8.c | 34 ++++++++++++++++--- .../arm/mve/intrinsics/vmullbq_poly_p16.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmullbq_poly_p8.c | 24 +++++++++++-- .../arm/mve/intrinsics/vmullbq_poly_x_p16.c | 33 ++++++++++++++++-- .../arm/mve/intrinsics/vmullbq_poly_x_p8.c | 33 ++++++++++++++++-- 24 files changed, 656 insertions(+), 72 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c index be933274d77..a4cc5e52773 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmullbq_int_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmullbq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c index 3dfc26761be..a195884567b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmullbq_int_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmullbq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c index f8c449b28a0..3a5d7705d45 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmullbq_int_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmullbq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c index dd6ed6b71a6..5e327d25a9b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmullbq_int_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmullbq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c index 85ce75e7dd8..fb2de994dd8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmullbq_int_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmullbq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c index d131a5d9fd7..4cc06c4ef28 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmullbq_int_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmullbq_int_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c index 22f4d27f6cc..16c0982386b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, int16x8_t b) { return vmullbq_int_s16 (a, b); } -/* { dg-final { scan-assembler "vmullb.s16" } } */ +/* +**foo1: +** ... +** vmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, int16x8_t b) { return vmullbq_int (a, b); } -/* { dg-final { scan-assembler "vmullb.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c index 6e677f26b84..e0a82d6e640 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int32x4_t a, int32x4_t b) { return vmullbq_int_s32 (a, b); } -/* { dg-final { scan-assembler "vmullb.s32" } } */ +/* +**foo1: +** ... +** vmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int32x4_t a, int32x4_t b) { return vmullbq_int (a, b); } -/* { dg-final { scan-assembler "vmullb.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c index f40b8a6c4dd..031a433c2bb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullb.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a, int8x16_t b) { return vmullbq_int_s8 (a, b); } -/* { dg-final { scan-assembler "vmullb.s8" } } */ +/* +**foo1: +** ... +** vmullb.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a, int8x16_t b) { return vmullbq_int (a, b); } -/* { dg-final { scan-assembler "vmullb.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c index 3529ab2772d..4bb19bf5cff 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullb.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, uint16x8_t b) { return vmullbq_int_u16 (a, b); } -/* { dg-final { scan-assembler "vmullb.u16" } } */ +/* +**foo1: +** ... +** vmullb.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, uint16x8_t b) { return vmullbq_int (a, b); } -/* { dg-final { scan-assembler "vmullb.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c index d843d2bf5fe..d461ed9f9c7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullb.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo (uint32x4_t a, uint32x4_t b) { return vmullbq_int_u32 (a, b); } -/* { dg-final { scan-assembler "vmullb.u32" } } */ +/* +**foo1: +** ... +** vmullb.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo1 (uint32x4_t a, uint32x4_t b) { return vmullbq_int (a, b); } -/* { dg-final { scan-assembler "vmullb.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c index 6268c463ead..c0790778b2d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullb.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, uint8x16_t b) { return vmullbq_int_u8 (a, b); } -/* { dg-final { scan-assembler "vmullb.u8" } } */ +/* +**foo1: +** ... +** vmullb.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, uint8x16_t b) { return vmullbq_int (a, b); } -/* { dg-final { scan-assembler "vmullb.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c index 87f8e21a7d0..ee83ca61158 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmullbq_int_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmullbq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c index 5e563728a4a..42ae3324cd9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmullbq_int_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmullbq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c index b2ca4134ee5..8dcf9b726b0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmullbq_int_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmullbq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c index 15269101fe5..31330da9a93 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmullbq_int_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmullbq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c index 7a7836303ec..b882d644347 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmullbq_int_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vmullbq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c index f422a3c66f0..4b402374eb7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmullbq_int_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmullbq_int_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c index 527acb74e09..2efb87dff01 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmullbq_poly_m_p16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.p16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmullbq_poly_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.p16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c index 5403394e870..b435f44cb32 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmullbq_poly_m_p8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.p8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmullbq_poly_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.p8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c index d01d5997ff4..bfd052222fe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullb.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, uint16x8_t b) { return vmullbq_poly_p16 (a, b); } -/* { dg-final { scan-assembler "vmullb.p16" } } */ +/* +**foo1: +** ... +** vmullb.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, uint16x8_t b) { return vmullbq_poly (a, b); } -/* { dg-final { scan-assembler "vmullb.p16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c index de97134add7..a2a53e8a3dc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmullb.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, uint8x16_t b) { return vmullbq_poly_p8 (a, b); } -/* { dg-final { scan-assembler "vmullb.p8" } } */ +/* +**foo1: +** ... +** vmullb.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, uint8x16_t b) { return vmullbq_poly (a, b); } -/* { dg-final { scan-assembler "vmullb.p8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c index f94d9052433..bee45f95939 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmullbq_poly_x_p16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.p16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vmullbq_poly_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c index 6fdc94496bc..7cd15f3a7f1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmullbq_poly_x_p8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmullbt.p8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vmullbq_poly_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file