From patchwork Tue Nov 29 00:45:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 61203 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A6EC23858409 for ; Tue, 29 Nov 2022 00:47:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A6EC23858409 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669682854; bh=fgM5s5CkxGE80458rvIvMIQYp8X6NZpO46Xug1epXB0=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=xuKx4OCy5jqAiCDGns8nqj7nPn0I9mM8Ji9CZ5HdZbsuNK6+XCwtE83ArmSeBR21N xZPwKZg1dxFM+ENS8YrTui1WEHNOKEitfsMQEf3W0IBhO3Wqk4xQ6+HwUK+BzHm1Vh WpkXH9A/V7ImsDMZHEx74qOA7Mi+Qs+w2BCGuLnk= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) by sourceware.org (Postfix) with ESMTPS id 0759F3858C83 for ; Tue, 29 Nov 2022 00:46:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0759F3858C83 Received: by mail-pf1-x42c.google.com with SMTP id q12so8095340pfn.10 for ; Mon, 28 Nov 2022 16:46:09 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fgM5s5CkxGE80458rvIvMIQYp8X6NZpO46Xug1epXB0=; b=1ddbq9ymdHc1j9UCttgX12hhEHnfmuWfGeDunW1LSGnswD+YgL0g2EhQ8gZiuePyVq uOgkyySopukXlo4l13V/HspKhAK87+XPstA7F5AG4lTIKD3Qq2kTYpCyG9eim0CDyPKU jx2ucAOr7x6CZiH4XUDvOO3w0JVppdBUIqYLyNu2THZDBmu7NHGI0JRyXqJ1bH8a65y/ yFbrzOCgD7z732EXviMLuyAqIVHw4l8HK+GwyebP6aqyGqcUlClcYwu9ju7T/wQ0CYGv UIhNStBTnKloXUbh5cKHiUzVAHVg+R9r8gL/I2fDMtCT7JwW59UXbkRDCziiF3rQORs4 t4Rw== X-Gm-Message-State: ANoB5pnfBR9WkK0zu16fznDojUL7vBJNbDulutmwABLUJvz10PPoS0W5 EnozBdiTri88ZvY8JDMjV0qSaOsrHLM= X-Google-Smtp-Source: AA0mqf7W0T/VfY4He7Ir0JpvLxceQxedG2RM12NSKLUhaTtgkqmU5n3mUEJnyLJUPp/8pUsQqIo5zQ== X-Received: by 2002:a63:f510:0:b0:478:1020:b1e6 with SMTP id w16-20020a63f510000000b004781020b1e6mr7736015pgh.561.1669682768391; Mon, 28 Nov 2022 16:46:08 -0800 (PST) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:bb27:8901:5994:c758]) by smtp.gmail.com with ESMTPSA id s128-20020a625e86000000b005752201d4ffsm1687491pfb.213.2022.11.28.16.46.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Nov 2022 16:46:07 -0800 (PST) To: gcc-patches@gcc.gnu.org Cc: Ian Lance Taylor , Max Filippov Subject: [PATCH v2 1/2] gcc: xtensa: allow dynamic configuration Date: Mon, 28 Nov 2022 16:45:50 -0800 Message-Id: <20221129004551.2213723-2-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221129004551.2213723-1-jcmvbkbc@gmail.com> References: <20221129004551.2213723-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, FROM_LOCAL_NOVOWEL, GIT_PATCH_0, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Max Filippov via Gcc-patches From: Max Filippov Reply-To: Max Filippov Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Import include/xtensa-dynconfig.h that defines XCHAL_* macros as fields of a structure returned from the xtensa_get_config_v function call. Define that structure and fill it with default parameter values specified in the include/xtensa-config.h. Define reusable function xtensa_load_config that tries to load configuration and return an address of an exported object from it. Define the function xtensa_get_config_v1 that uses xtensa_load_config to get structure xtensa_config_v1, either dynamically configured or the default. Provide essential XCHAL_* configuration parameters as __XCHAL_* built-in macros. This way it will be possible to use them in libgcc and libc without need to patch libgcc or libc source for the specific xtensa core configuration. gcc/ * config.gcc (xtensa*-*-*): Add xtensa-dynconfig.o to extra_objs. * config/xtensa/t-xtensa (TM_H): Add xtensa-dynconfig.h. (xtensa-dynconfig.o): New rule. * config/xtensa/xtensa-dynconfig.c: New file. * config/xtensa/xtensa-protos.h (xtensa_get_config_strings): New declaration. * config/xtensa/xtensa.h (xtensa-config.h): Replace #include with xtensa-dynconfig.h (XCHAL_HAVE_MUL32_HIGH, XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I, XCHAL_HAVE_THREADPTR, XCHAL_HAVE_FP_POSTINC): Drop definitions. (TARGET_DIV32): Replace with __XCHAL_HAVE_DIV32. (TARGET_CPU_CPP_BUILTINS): Add new 'builtin' variable and loop through string array returned by the xtensa_get_config_strings function call. include/ * xtensa-dynconfig.h: New file. --- gcc/config.gcc | 1 + gcc/config/xtensa/t-xtensa | 8 +- gcc/config/xtensa/xtensa-dynconfig.c | 170 +++++++++++ gcc/config/xtensa/xtensa-protos.h | 1 + gcc/config/xtensa/xtensa.h | 22 +- include/xtensa-dynconfig.h | 442 +++++++++++++++++++++++++++ 6 files changed, 626 insertions(+), 18 deletions(-) create mode 100644 gcc/config/xtensa/xtensa-dynconfig.c create mode 100644 include/xtensa-dynconfig.h diff --git a/gcc/config.gcc b/gcc/config.gcc index b5eda0460331..951902338205 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -561,6 +561,7 @@ tic6x-*-*) ;; xtensa*-*-*) extra_options="${extra_options} fused-madd.opt" + extra_objs="xtensa-dynconfig.o" ;; esac diff --git a/gcc/config/xtensa/t-xtensa b/gcc/config/xtensa/t-xtensa index 6d43b370e5a8..4e5b7dec1bce 100644 --- a/gcc/config/xtensa/t-xtensa +++ b/gcc/config/xtensa/t-xtensa @@ -16,5 +16,11 @@ # along with GCC; see the file COPYING3. If not see # . -TM_H += $(srcdir)/../include/xtensa-config.h +TM_H += $(srcdir)/../include/xtensa-config.h \ + $(srcdir)/../include/xtensa-dynconfig.h $(out_object_file): gt-xtensa.h + +xtensa-dynconfig.o: $(srcdir)/config/xtensa/xtensa-dynconfig.c \ + $(CONFIG_H) $(SYSTEM_H) $(srcdir)/../include/xtensa-dynconfig.h \ + $(srcdir)/../include/xtensa-config.h + $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $< diff --git a/gcc/config/xtensa/xtensa-dynconfig.c b/gcc/config/xtensa/xtensa-dynconfig.c new file mode 100644 index 000000000000..056204ae9463 --- /dev/null +++ b/gcc/config/xtensa/xtensa-dynconfig.c @@ -0,0 +1,170 @@ +/* Xtensa configuration settings loader. + Copyright (C) 2022 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License as published by the Free + Software Foundation; either version 3, or (at your option) any later + version. + + GCC is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + . */ + +#include +#include +#include +#include +#include +#define XTENSA_CONFIG_DEFINITION +#include "xtensa-config.h" +#include "xtensa-dynconfig.h" + +#if defined (HAVE_DLFCN_H) +#include +#elif defined (_WIN32) +#include +#define ENABLE_PLUGIN +#endif + +#if !defined (HAVE_DLFCN_H) && defined (_WIN32) + +#define RTLD_LAZY 0 /* Dummy value. */ + +static void * +dlopen (const char *file, int mode ATTRIBUTE_UNUSED) +{ + return LoadLibrary (file); +} + +static void * +dlsym (void *handle, const char *name) +{ + return (void *) GetProcAddress ((HMODULE) handle, name); +} + +static int ATTRIBUTE_UNUSED +dlclose (void *handle) +{ + FreeLibrary ((HMODULE) handle); + return 0; +} + +static const char * +dlerror (void) +{ + return _("Unable to load DLL."); +} + +#endif /* !defined (HAVE_DLFCN_H) && defined (_WIN32) */ + +#define CONFIG_ENV_NAME "XTENSA_GNU_CONFIG" + +const void *xtensa_load_config (const char *name ATTRIBUTE_UNUSED, + const void *no_plugin_def, + const void *no_name_def ATTRIBUTE_UNUSED) +{ + static int init; +#ifdef ENABLE_PLUGIN + static void *handle; + void *p; + + if (!init) + { + const char *path = getenv (CONFIG_ENV_NAME); + + init = 1; + if (!path) + return no_plugin_def; + handle = dlopen (path, RTLD_LAZY); + if (!handle) + { + fatal_error (input_location, + _("%qs is defined but could not be loaded: %s"), + CONFIG_ENV_NAME, dlerror ()); + exit (FATAL_EXIT_CODE); + } + if (dlsym (handle, "plugin_is_GPL_compatible") == NULL) + { + fatal_error (input_location, + _("%qs plugin is not licensed under a GPL-compatible license"), + CONFIG_ENV_NAME); + exit (FATAL_EXIT_CODE); + } + } + else if (!handle) + { + return no_plugin_def; + } + + p = dlsym (handle, name); + if (!p) + { + if (no_name_def) + return no_name_def; + + fatal_error (input_location, + _("%qs is loaded but symbol %qs is not found: %s"), + CONFIG_ENV_NAME, name, dlerror ()); + exit (FATAL_EXIT_CODE); + } + return p; +#else + if (!init) + { + const char *path = getenv (CONFIG_ENV_NAME); + + init = 1; + if (path) + { + fatal_error (input_location, + _("%qs is defined but plugin support is disabled"), + CONFIG_ENV_NAME); + exit (FATAL_EXIT_CODE); + } + } + return no_plugin_def; +#endif +} + +XTENSA_CONFIG_INSTANCE_LIST; + +#define _STRINGIFY(a) #a +#define STRINGIFY(a) _STRINGIFY(a) + +#undef XTENSA_CONFIG_ENTRY +#define XTENSA_CONFIG_ENTRY(a) "__" #a "=" STRINGIFY(a) + +static const char * const xtensa_config_strings[] = { + XTENSA_CONFIG_ENTRY_LIST, + NULL, +}; + +const struct xtensa_config_v1 *xtensa_get_config_v1 (void) +{ + static const struct xtensa_config_v1 *config; + + if (!config) + config = (const struct xtensa_config_v1 *) xtensa_load_config ("xtensa_config_v1", + &xtensa_config_v1, + NULL); + return config; +} + +const char * const *xtensa_get_config_strings (void) +{ + static const char * const *config_strings; + + if (!config_strings) + config_strings = (const char * const *) xtensa_load_config ("xtensa_config_strings", + &xtensa_config_strings, + NULL); + + return config_strings; +} diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h index bc75ad9698ae..91a215e535d7 100644 --- a/gcc/config/xtensa/xtensa-protos.h +++ b/gcc/config/xtensa/xtensa-protos.h @@ -81,5 +81,6 @@ extern void xtensa_expand_epilogue (bool); extern void order_regs_for_local_alloc (void); extern enum reg_class xtensa_regno_to_class (int regno); extern HOST_WIDE_INT xtensa_initial_elimination_offset (int from, int to); +extern const char **xtensa_get_config_strings (void); #endif /* !__XTENSA_PROTOS_H__ */ diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h index 2275fe6d426f..7e193068431c 100644 --- a/gcc/config/xtensa/xtensa.h +++ b/gcc/config/xtensa/xtensa.h @@ -19,27 +19,12 @@ along with GCC; see the file COPYING3. If not see . */ /* Get Xtensa configuration settings */ -#include "xtensa-config.h" +#include "xtensa-dynconfig.h" /* External variables defined in xtensa.cc. */ /* Macros used in the machine description to select various Xtensa configuration options. */ -#ifndef XCHAL_HAVE_MUL32_HIGH -#define XCHAL_HAVE_MUL32_HIGH 0 -#endif -#ifndef XCHAL_HAVE_RELEASE_SYNC -#define XCHAL_HAVE_RELEASE_SYNC 0 -#endif -#ifndef XCHAL_HAVE_S32C1I -#define XCHAL_HAVE_S32C1I 0 -#endif -#ifndef XCHAL_HAVE_THREADPTR -#define XCHAL_HAVE_THREADPTR 0 -#endif -#ifndef XCHAL_HAVE_FP_POSTINC -#define XCHAL_HAVE_FP_POSTINC 0 -#endif #define TARGET_BIG_ENDIAN XCHAL_HAVE_BE #define TARGET_DENSITY XCHAL_HAVE_DENSITY #define TARGET_MAC16 XCHAL_HAVE_MAC16 @@ -76,7 +61,7 @@ along with GCC; see the file COPYING3. If not see #endif /* Define this if the target has no hardware divide instructions. */ -#if !TARGET_DIV32 +#if !__XCHAL_HAVE_DIV32 #define TARGET_HAS_NO_HW_DIVIDE #endif @@ -84,6 +69,7 @@ along with GCC; see the file COPYING3. If not see /* Target CPU builtins. */ #define TARGET_CPU_CPP_BUILTINS() \ do { \ + const char **builtin; \ builtin_assert ("cpu=xtensa"); \ builtin_assert ("machine=xtensa"); \ builtin_define ("__xtensa__"); \ @@ -93,6 +79,8 @@ along with GCC; see the file COPYING3. If not see builtin_define (TARGET_BIG_ENDIAN ? "__XTENSA_EB__" : "__XTENSA_EL__"); \ if (!TARGET_HARD_FLOAT) \ builtin_define ("__XTENSA_SOFT_FLOAT__"); \ + for (builtin = xtensa_get_config_strings (); *builtin; ++builtin) \ + builtin_define (*builtin); \ } while (0) #define CPP_SPEC " %(subtarget_cpp_spec) " diff --git a/include/xtensa-dynconfig.h b/include/xtensa-dynconfig.h new file mode 100644 index 000000000000..807a8ce61178 --- /dev/null +++ b/include/xtensa-dynconfig.h @@ -0,0 +1,442 @@ +/* Xtensa configuration settings. + Copyright (C) 2022 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +#ifndef XTENSA_DYNCONFIG_H +#define XTENSA_DYNCONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Config versioning. + * + * When new config entries need to be passed through dynconfig + * create new xtensa_config_v structure and put them there. + * Declare new function xtensa_get_config_v (void). + * Define corresponding X*HAL_* macros by accessing xtensa_get_config_v (). + * Define macro XTENSA_CONFIG_V_ENTRY_LIST by listing + * XTENSA_CONFIG_ENTRY for every entry in the new structure. + * Add constant definition for the new xtensa_config_v to the + * XTENSA_CONFIG_INSTANCE_LIST. + * Add XTENSA_CONFIG_V_ENTRY_LIST to the XTENSA_CONFIG_ENTRY_LIST. + * + * On the user side (gcc/binutils/...) add definition for the function + * xtensa_get_config_v (void). + */ + +struct xtensa_config_v1 +{ + int xchal_have_be; + int xchal_have_density; + int xchal_have_const16; + int xchal_have_abs; + int xchal_have_addx; + int xchal_have_l32r; + int xshal_use_absolute_literals; + int xshal_have_text_section_literals; + int xchal_have_mac16; + int xchal_have_mul16; + int xchal_have_mul32; + int xchal_have_mul32_high; + int xchal_have_div32; + int xchal_have_nsa; + int xchal_have_minmax; + int xchal_have_sext; + int xchal_have_loops; + int xchal_have_threadptr; + int xchal_have_release_sync; + int xchal_have_s32c1i; + int xchal_have_booleans; + int xchal_have_fp; + int xchal_have_fp_div; + int xchal_have_fp_recip; + int xchal_have_fp_sqrt; + int xchal_have_fp_rsqrt; + int xchal_have_fp_postinc; + int xchal_have_dfp; + int xchal_have_dfp_div; + int xchal_have_dfp_recip; + int xchal_have_dfp_sqrt; + int xchal_have_dfp_rsqrt; + int xchal_have_windowed; + int xchal_num_aregs; + int xchal_have_wide_branches; + int xchal_have_predicted_branches; + int xchal_icache_size; + int xchal_dcache_size; + int xchal_icache_linesize; + int xchal_dcache_linesize; + int xchal_icache_linewidth; + int xchal_dcache_linewidth; + int xchal_dcache_is_writeback; + int xchal_have_mmu; + int xchal_mmu_min_pte_page_size; + int xchal_have_debug; + int xchal_num_ibreak; + int xchal_num_dbreak; + int xchal_debuglevel; + int xchal_max_instruction_size; + int xchal_inst_fetch_width; + int xshal_abi; + int xthal_abi_windowed; + int xthal_abi_call0; +}; + +struct xtensa_config_v2 +{ + int xchal_m_stage; + int xtensa_march_latest; + int xtensa_march_earliest; +}; + +typedef struct xtensa_isa_internal_struct xtensa_isa_internal; + +extern const void *xtensa_load_config (const char *name, + const void *no_plugin_def, + const void *no_name_def); +extern const struct xtensa_config_v1 *xtensa_get_config_v1 (void); +extern const struct xtensa_config_v2 *xtensa_get_config_v2 (void); + +#ifdef XTENSA_CONFIG_DEFINITION + +#ifndef XCHAL_HAVE_MUL32_HIGH +#define XCHAL_HAVE_MUL32_HIGH 0 +#endif + +#ifndef XCHAL_HAVE_RELEASE_SYNC +#define XCHAL_HAVE_RELEASE_SYNC 0 +#endif + +#ifndef XCHAL_HAVE_S32C1I +#define XCHAL_HAVE_S32C1I 0 +#endif + +#ifndef XCHAL_HAVE_THREADPTR +#define XCHAL_HAVE_THREADPTR 0 +#endif + +#ifndef XCHAL_HAVE_FP_POSTINC +#define XCHAL_HAVE_FP_POSTINC 0 +#endif + +#ifndef XCHAL_HAVE_DFP +#define XCHAL_HAVE_DFP 0 +#endif + +#ifndef XCHAL_HAVE_DFP_DIV +#define XCHAL_HAVE_DFP_DIV 0 +#endif + +#ifndef XCHAL_HAVE_DFP_RECIP +#define XCHAL_HAVE_DFP_RECIP 0 +#endif + +#ifndef XCHAL_HAVE_DFP_SQRT +#define XCHAL_HAVE_DFP_SQRT 0 +#endif + +#ifndef XCHAL_HAVE_DFP_RSQRT +#define XCHAL_HAVE_DFP_RSQRT 0 +#endif + +#ifndef XSHAL_HAVE_TEXT_SECTION_LITERALS +#define XSHAL_HAVE_TEXT_SECTION_LITERALS 0 +#endif + +#ifndef XCHAL_MMU_MIN_PTE_PAGE_SIZE +#define XCHAL_MMU_MIN_PTE_PAGE_SIZE 1 +#endif + +#ifndef XTHAL_ABI_WINDOWED +#define XTHAL_ABI_WINDOWED 0 +#endif + +#ifndef XTHAL_ABI_CALL0 +#define XTHAL_ABI_CALL0 1 +#endif + +#ifndef XCHAL_M_STAGE +#define XCHAL_M_STAGE 0 +#endif + +#ifndef XTENSA_MARCH_LATEST +#define XTENSA_MARCH_LATEST 0 +#endif + +#ifndef XTENSA_MARCH_EARLIEST +#define XTENSA_MARCH_EARLIEST 0 +#endif + +#define XTENSA_CONFIG_ENTRY(a) a + +#define XTENSA_CONFIG_V1_ENTRY_LIST \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BE), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DENSITY), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_CONST16), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ABS), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ADDX), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_L32R), \ + XTENSA_CONFIG_ENTRY(XSHAL_USE_ABSOLUTE_LITERALS), \ + XTENSA_CONFIG_ENTRY(XSHAL_HAVE_TEXT_SECTION_LITERALS), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MAC16), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL16), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32_HIGH), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DIV32), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_NSA), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MINMAX), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_SEXT), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_LOOPS), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_THREADPTR), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_RELEASE_SYNC), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_S32C1I), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BOOLEANS), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_DIV), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RECIP), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_SQRT), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RSQRT), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_POSTINC), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_DIV), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RECIP), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_SQRT), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RSQRT), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WINDOWED), \ + XTENSA_CONFIG_ENTRY(XCHAL_NUM_AREGS), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WIDE_BRANCHES), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_PREDICTED_BRANCHES), \ + XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_SIZE), \ + XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_SIZE), \ + XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINESIZE), \ + XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINESIZE), \ + XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINEWIDTH), \ + XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINEWIDTH), \ + XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_IS_WRITEBACK), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MMU), \ + XTENSA_CONFIG_ENTRY(XCHAL_MMU_MIN_PTE_PAGE_SIZE), \ + XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DEBUG), \ + XTENSA_CONFIG_ENTRY(XCHAL_NUM_IBREAK), \ + XTENSA_CONFIG_ENTRY(XCHAL_NUM_DBREAK), \ + XTENSA_CONFIG_ENTRY(XCHAL_DEBUGLEVEL), \ + XTENSA_CONFIG_ENTRY(XCHAL_MAX_INSTRUCTION_SIZE), \ + XTENSA_CONFIG_ENTRY(XCHAL_INST_FETCH_WIDTH), \ + XTENSA_CONFIG_ENTRY(XSHAL_ABI), \ + XTENSA_CONFIG_ENTRY(XTHAL_ABI_WINDOWED), \ + XTENSA_CONFIG_ENTRY(XTHAL_ABI_CALL0) + +#define XTENSA_CONFIG_V2_ENTRY_LIST \ + XTENSA_CONFIG_ENTRY(XCHAL_M_STAGE), \ + XTENSA_CONFIG_ENTRY(XTENSA_MARCH_LATEST), \ + XTENSA_CONFIG_ENTRY(XTENSA_MARCH_EARLIEST) + +#define XTENSA_CONFIG_INSTANCE_LIST \ +const struct xtensa_config_v1 xtensa_config_v1 = { \ + XTENSA_CONFIG_V1_ENTRY_LIST, \ +}; \ +const struct xtensa_config_v2 xtensa_config_v2 = { \ + XTENSA_CONFIG_V2_ENTRY_LIST, \ +} + +#define XTENSA_CONFIG_ENTRY_LIST \ + XTENSA_CONFIG_V1_ENTRY_LIST, \ + XTENSA_CONFIG_V2_ENTRY_LIST + +#else /* XTENSA_CONFIG_DEFINITION */ + +#undef XCHAL_HAVE_BE +#define XCHAL_HAVE_BE (xtensa_get_config_v1 ()->xchal_have_be) + +#undef XCHAL_HAVE_DENSITY +#define XCHAL_HAVE_DENSITY (xtensa_get_config_v1 ()->xchal_have_density) + +#undef XCHAL_HAVE_CONST16 +#define XCHAL_HAVE_CONST16 (xtensa_get_config_v1 ()->xchal_have_const16) + +#undef XCHAL_HAVE_ABS +#define XCHAL_HAVE_ABS (xtensa_get_config_v1 ()->xchal_have_abs) + +#undef XCHAL_HAVE_ADDX +#define XCHAL_HAVE_ADDX (xtensa_get_config_v1 ()->xchal_have_addx) + +#undef XCHAL_HAVE_L32R +#define XCHAL_HAVE_L32R (xtensa_get_config_v1 ()->xchal_have_l32r) + +#undef XSHAL_USE_ABSOLUTE_LITERALS +#define XSHAL_USE_ABSOLUTE_LITERALS (xtensa_get_config_v1 ()->xshal_use_absolute_literals) + +#undef XSHAL_HAVE_TEXT_SECTION_LITERALS +#define XSHAL_HAVE_TEXT_SECTION_LITERALS (xtensa_get_config_v1 ()->xshal_have_text_section_literals) + +#undef XCHAL_HAVE_MAC16 +#define XCHAL_HAVE_MAC16 (xtensa_get_config_v1 ()->xchal_have_mac16) + +#undef XCHAL_HAVE_MUL16 +#define XCHAL_HAVE_MUL16 (xtensa_get_config_v1 ()->xchal_have_mul16) + +#undef XCHAL_HAVE_MUL32 +#define XCHAL_HAVE_MUL32 (xtensa_get_config_v1 ()->xchal_have_mul32) + +#undef XCHAL_HAVE_MUL32_HIGH +#define XCHAL_HAVE_MUL32_HIGH (xtensa_get_config_v1 ()->xchal_have_mul32_high) + +#undef XCHAL_HAVE_DIV32 +#define XCHAL_HAVE_DIV32 (xtensa_get_config_v1 ()->xchal_have_div32) + +#undef XCHAL_HAVE_NSA +#define XCHAL_HAVE_NSA (xtensa_get_config_v1 ()->xchal_have_nsa) + +#undef XCHAL_HAVE_MINMAX +#define XCHAL_HAVE_MINMAX (xtensa_get_config_v1 ()->xchal_have_minmax) + +#undef XCHAL_HAVE_SEXT +#define XCHAL_HAVE_SEXT (xtensa_get_config_v1 ()->xchal_have_sext) + +#undef XCHAL_HAVE_LOOPS +#define XCHAL_HAVE_LOOPS (xtensa_get_config_v1 ()->xchal_have_loops) + +#undef XCHAL_HAVE_THREADPTR +#define XCHAL_HAVE_THREADPTR (xtensa_get_config_v1 ()->xchal_have_threadptr) + +#undef XCHAL_HAVE_RELEASE_SYNC +#define XCHAL_HAVE_RELEASE_SYNC (xtensa_get_config_v1 ()->xchal_have_release_sync) + +#undef XCHAL_HAVE_S32C1I +#define XCHAL_HAVE_S32C1I (xtensa_get_config_v1 ()->xchal_have_s32c1i) + +#undef XCHAL_HAVE_BOOLEANS +#define XCHAL_HAVE_BOOLEANS (xtensa_get_config_v1 ()->xchal_have_booleans) + +#undef XCHAL_HAVE_FP +#define XCHAL_HAVE_FP (xtensa_get_config_v1 ()->xchal_have_fp) + +#undef XCHAL_HAVE_FP_DIV +#define XCHAL_HAVE_FP_DIV (xtensa_get_config_v1 ()->xchal_have_fp_div) + +#undef XCHAL_HAVE_FP_RECIP +#define XCHAL_HAVE_FP_RECIP (xtensa_get_config_v1 ()->xchal_have_fp_recip) + +#undef XCHAL_HAVE_FP_SQRT +#define XCHAL_HAVE_FP_SQRT (xtensa_get_config_v1 ()->xchal_have_fp_sqrt) + +#undef XCHAL_HAVE_FP_RSQRT +#define XCHAL_HAVE_FP_RSQRT (xtensa_get_config_v1 ()->xchal_have_fp_rsqrt) + +#undef XCHAL_HAVE_FP_POSTINC +#define XCHAL_HAVE_FP_POSTINC (xtensa_get_config_v1 ()->xchal_have_fp_postinc) + +#undef XCHAL_HAVE_DFP +#define XCHAL_HAVE_DFP (xtensa_get_config_v1 ()->xchal_have_dfp) + +#undef XCHAL_HAVE_DFP_DIV +#define XCHAL_HAVE_DFP_DIV (xtensa_get_config_v1 ()->xchal_have_dfp_div) + +#undef XCHAL_HAVE_DFP_RECIP +#define XCHAL_HAVE_DFP_RECIP (xtensa_get_config_v1 ()->xchal_have_dfp_recip) + +#undef XCHAL_HAVE_DFP_SQRT +#define XCHAL_HAVE_DFP_SQRT (xtensa_get_config_v1 ()->xchal_have_dfp_sqrt) + +#undef XCHAL_HAVE_DFP_RSQRT +#define XCHAL_HAVE_DFP_RSQRT (xtensa_get_config_v1 ()->xchal_have_dfp_rsqrt) + +#undef XCHAL_HAVE_WINDOWED +#define XCHAL_HAVE_WINDOWED (xtensa_get_config_v1 ()->xchal_have_windowed) + +#undef XCHAL_NUM_AREGS +#define XCHAL_NUM_AREGS (xtensa_get_config_v1 ()->xchal_num_aregs) + +#undef XCHAL_HAVE_WIDE_BRANCHES +#define XCHAL_HAVE_WIDE_BRANCHES (xtensa_get_config_v1 ()->xchal_have_wide_branches) + +#undef XCHAL_HAVE_PREDICTED_BRANCHES +#define XCHAL_HAVE_PREDICTED_BRANCHES (xtensa_get_config_v1 ()->xchal_have_predicted_branches) + + +#undef XCHAL_ICACHE_SIZE +#define XCHAL_ICACHE_SIZE (xtensa_get_config_v1 ()->xchal_icache_size) + +#undef XCHAL_DCACHE_SIZE +#define XCHAL_DCACHE_SIZE (xtensa_get_config_v1 ()->xchal_dcache_size) + +#undef XCHAL_ICACHE_LINESIZE +#define XCHAL_ICACHE_LINESIZE (xtensa_get_config_v1 ()->xchal_icache_linesize) + +#undef XCHAL_DCACHE_LINESIZE +#define XCHAL_DCACHE_LINESIZE (xtensa_get_config_v1 ()->xchal_dcache_linesize) + +#undef XCHAL_ICACHE_LINEWIDTH +#define XCHAL_ICACHE_LINEWIDTH (xtensa_get_config_v1 ()->xchal_icache_linewidth) + +#undef XCHAL_DCACHE_LINEWIDTH +#define XCHAL_DCACHE_LINEWIDTH (xtensa_get_config_v1 ()->xchal_dcache_linewidth) + +#undef XCHAL_DCACHE_IS_WRITEBACK +#define XCHAL_DCACHE_IS_WRITEBACK (xtensa_get_config_v1 ()->xchal_dcache_is_writeback) + + +#undef XCHAL_HAVE_MMU +#define XCHAL_HAVE_MMU (xtensa_get_config_v1 ()->xchal_have_mmu) + +#undef XCHAL_MMU_MIN_PTE_PAGE_SIZE +#define XCHAL_MMU_MIN_PTE_PAGE_SIZE (xtensa_get_config_v1 ()->xchal_mmu_min_pte_page_size) + + +#undef XCHAL_HAVE_DEBUG +#define XCHAL_HAVE_DEBUG (xtensa_get_config_v1 ()->xchal_have_debug) + +#undef XCHAL_NUM_IBREAK +#define XCHAL_NUM_IBREAK (xtensa_get_config_v1 ()->xchal_num_ibreak) + +#undef XCHAL_NUM_DBREAK +#define XCHAL_NUM_DBREAK (xtensa_get_config_v1 ()->xchal_num_dbreak) + +#undef XCHAL_DEBUGLEVEL +#define XCHAL_DEBUGLEVEL (xtensa_get_config_v1 ()->xchal_debuglevel) + + +#undef XCHAL_MAX_INSTRUCTION_SIZE +#define XCHAL_MAX_INSTRUCTION_SIZE (xtensa_get_config_v1 ()->xchal_max_instruction_size) + +#undef XCHAL_INST_FETCH_WIDTH +#define XCHAL_INST_FETCH_WIDTH (xtensa_get_config_v1 ()->xchal_inst_fetch_width) + + +#undef XSHAL_ABI +#undef XTHAL_ABI_WINDOWED +#undef XTHAL_ABI_CALL0 +#define XSHAL_ABI (xtensa_get_config_v1 ()->xshal_abi) +#define XTHAL_ABI_WINDOWED (xtensa_get_config_v1 ()->xthal_abi_windowed) +#define XTHAL_ABI_CALL0 (xtensa_get_config_v1 ()->xthal_abi_call0) + + +#undef XCHAL_M_STAGE +#define XCHAL_M_STAGE (xtensa_get_config_v2 ()->xchal_m_stage) + +#undef XTENSA_MARCH_LATEST +#define XTENSA_MARCH_LATEST (xtensa_get_config_v2 ()->xtensa_march_latest) + +#undef XTENSA_MARCH_EARLIEST +#define XTENSA_MARCH_EARLIEST (xtensa_get_config_v2 ()->xtensa_march_earliest) + +#endif /* XTENSA_CONFIG_DEFINITION */ + +#ifdef __cplusplus +} +#endif +#endif /* !XTENSA_DYNCONFIG_H */