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Thu, 17 Nov 2022 16:38:31 +0000 To: CC: , , Andrea Corallo Subject: [PATCH 35/35] arm: improve tests for vsetq_lane* Date: Thu, 17 Nov 2022 17:38:09 +0100 Message-ID: <20221117163809.1009526-36-andrea.corallo@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221117163809.1009526-1-andrea.corallo@arm.com> References: <20221117163809.1009526-1-andrea.corallo@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: DBAEUR03FT029:EE_|AS2PR08MB8647:EE_|DBAEUR03FT040:EE_|DB9PR08MB9611:EE_ X-MS-Office365-Filtering-Correlation-Id: ff57b3b7-166f-4779-a950-08dac8ba2f53 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: EQGx0gE8gXFXPAG5VifpdmlLHxuX8eBs3KLrs+OlMJ1nrLcJOy4W6e6k7cRWy2h+mfZX2sQ8BDWpiKy1s7UgK/mpR0gsGbVHgZMYyiZ2eOCttP4J19g2TDLzOSDTUP+iOzYVu5LtFcSiT2vikWH9dgXTXHzNFV4T1kL6BJHpw8KNraKoxCta+ebL9lY+1r7ptounnABlKWKKiL27Qnd096fwvr9ipy5jYZGbLirueQhdG9JmYYeZj4jQGWS5HTU4EqUWT29F+IkuDslEqNFtxw3XOoUFIMVYg6yMyAcOelzbFTrpzvLdzi7S2RUTvdorOZdnKKtxVXa29LffNwIxAyul4SMgd5cWkHm0iXesKM+vl6GMzMp5/wQjI4IalzLoceO7oVxkHRhijCZrDUqMB+wmiieNvvmGKiqFTyyLDb7R8+k6sFrTJn43WUottFx4BC3Wyoy1GmJtLnLR3DBG4xq2qMxNsigfKBmfHnkR+++Zi6tPN7pKuNCewtc/lypkbJ4l/oeBEYcyhc6z2OiMfRJ+mIX6GMKTUuvQdXU+ZJ5dcDFUBSTydn04Ks099SKzzL7MA0VfTYqMde+yem6peCyiUV0hDQVCujXRPlVP3xgjLInTL9VhgbK2j/Dn4vTzSuRupuWtl/yuvW24UXBpj6IkjJAfCqKCiGocJML2vLCeOtuy1MGR9jBTiJ9SuR46hBd3D9Zg3HirBDQqOrJJivl5K7LL3Q02SPlEnR0WCI+Yfmo4laqRvqrCQ1ahTz71NfJUZNUvCpbJ2bPzABQEl8W4qo9Xr4GrVmzs4ITEiIXTFLK8Vfhumv+ri48X3rzI X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; 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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT040.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB9611 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrea Corallo via Gcc-patches From: Andrea Corallo Reply-To: Andrea Corallo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Improve test. * gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise. --- .../arm/mve/intrinsics/vsetq_lane_f16.c | 36 +++++++++++++++-- .../arm/mve/intrinsics/vsetq_lane_f32.c | 36 +++++++++++++++-- .../arm/mve/intrinsics/vsetq_lane_s16.c | 24 ++++++++++-- .../arm/mve/intrinsics/vsetq_lane_s32.c | 24 ++++++++++-- .../arm/mve/intrinsics/vsetq_lane_s64.c | 27 ++++++++++--- .../arm/mve/intrinsics/vsetq_lane_s8.c | 24 ++++++++++-- .../arm/mve/intrinsics/vsetq_lane_u16.c | 36 +++++++++++++++-- .../arm/mve/intrinsics/vsetq_lane_u32.c | 36 +++++++++++++++-- .../arm/mve/intrinsics/vsetq_lane_u64.c | 39 ++++++++++++++++--- .../arm/mve/intrinsics/vsetq_lane_u8.c | 36 +++++++++++++++-- 10 files changed, 284 insertions(+), 34 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c index e03e9620528..b5c9f4d5eb8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.16 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16_t a, float16x8_t b) { - return vsetq_lane_f16 (a, b, 0); + return vsetq_lane_f16 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.16" } } */ +/* +**foo1: +** ... +** vmov.16 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16_t a, float16x8_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.16 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo2 (float16x8_t b) +{ + return vsetq_lane (1.1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c index 2b9f1a7e627..211083ce5d4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.32 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32_t a, float32x4_t b) { - return vsetq_lane_f32 (a, b, 0); + return vsetq_lane_f32 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.32" } } */ +/* +**foo1: +** ... +** vmov.32 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo1 (float32_t a, float32x4_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.32 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo2 (float32x4_t b) +{ + return vsetq_lane (1.1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c index 92ad0dd16a8..9cdaeae1e74 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c @@ -1,15 +1,33 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.16 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16_t a, int16x8_t b) { - return vsetq_lane_s16 (a, b, 0); + return vsetq_lane_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.16" } } */ +/* +**foo1: +** ... +** vmov.16 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +int16x8_t +foo1 (int16_t a, int16x8_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c index e60c8f26700..edd06bce1bd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c @@ -1,15 +1,33 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.32 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32_t a, int32x4_t b) { - return vsetq_lane_s32 (a, b, 0); + return vsetq_lane_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.32" } } */ +/* +**foo1: +** ... +** vmov.32 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +int32x4_t +foo1 (int32_t a, int32x4_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c index 430df669f2a..95ba4da1f51 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c @@ -1,16 +1,33 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ -/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ -/* { dg-additional-options "-mfloat-abi=hard -O2" } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo (int64_t a, int64x2_t b) { - return vsetq_lane_s64 (a, b, 0); + return vsetq_lane_s64 (a, b, 1); } -/* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]} } } */ +/* +**foo1: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +int64x2_t +foo1 (int64_t a, int64x2_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c index d8ccbb524fd..f5bf0dd663b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c @@ -1,15 +1,33 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.8 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8_t a, int8x16_t b) { - return vsetq_lane_s8 (a, b, 0); + return vsetq_lane_s8 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.8" } } */ +/* +**foo1: +** ... +** vmov.8 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +int8x16_t +foo1 (int8_t a, int8x16_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c index 156a5d1de1b..33944dcbd45 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.16 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16_t a, uint16x8_t b) { - return vsetq_lane_u16 (a, b, 0); + return vsetq_lane_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.16" } } */ +/* +**foo1: +** ... +** vmov.16 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo1 (uint16_t a, uint16x8_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.16 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t b) +{ + return vsetq_lane (1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c index e9575483cc9..8f9a3a78cc5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.32 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32_t a, uint32x4_t b) { - return vsetq_lane_u32 (a, b, 0); + return vsetq_lane_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.32" } } */ +/* +**foo1: +** ... +** vmov.32 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo1 (uint32_t a, uint32x4_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.32 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t b) +{ + return vsetq_lane (1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c index 0e040121cf0..5ce4c544c25 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c @@ -1,16 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ -/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ -/* { dg-additional-options "-mfloat-abi=hard -O2" } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint64x2_t foo (uint64_t a, uint64x2_t b) { - return vsetq_lane_u64 (a, b, 0); + return vsetq_lane_u64 (a, b, 1); } -/* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]} } } */ +/* +**foo1: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint64x2_t +foo1 (uint64_t a, uint64x2_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint64x2_t +foo2 (uint64x2_t b) +{ + return vsetq_lane (1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c index 668b3fea953..d37021c91b0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.8 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8_t a, uint8x16_t b) { - return vsetq_lane_u8 (a, b, 0); + return vsetq_lane_u8 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.8" } } */ +/* +**foo1: +** ... +** vmov.8 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo1 (uint8_t a, uint8x16_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.8 q[0-9]+\[[0-9]+\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t b) +{ + return vsetq_lane (1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file