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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT046.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB8498 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrea Corallo via Gcc-patches From: Andrea Corallo Reply-To: Andrea Corallo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Improve test. * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise. --- .../arm/mve/intrinsics/vqdmlahq_m_n_s16.c | 34 ++++++++++++++----- .../arm/mve/intrinsics/vqdmlahq_m_n_s32.c | 34 ++++++++++++++----- .../arm/mve/intrinsics/vqdmlahq_m_n_s8.c | 34 ++++++++++++++----- .../arm/mve/intrinsics/vqdmlahq_n_s16.c | 24 +++++++++---- .../arm/mve/intrinsics/vqdmlahq_n_s32.c | 24 +++++++++---- .../arm/mve/intrinsics/vqdmlahq_n_s8.c | 24 +++++++++---- .../arm/mve/intrinsics/vqdmlashq_m_n_s16.c | 34 ++++++++++++++----- .../arm/mve/intrinsics/vqdmlashq_m_n_s32.c | 34 ++++++++++++++----- .../arm/mve/intrinsics/vqdmlashq_m_n_s8.c | 34 ++++++++++++++----- .../arm/mve/intrinsics/vqdmlashq_n_s16.c | 24 +++++++++---- .../arm/mve/intrinsics/vqdmlashq_n_s32.c | 24 +++++++++---- .../arm/mve/intrinsics/vqdmlashq_n_s8.c | 24 +++++++++---- 12 files changed, 264 insertions(+), 84 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c index d8c4f4bab8e..94d93874542 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) { - return vqdmlahq_m_n_s16 (a, b, c, p); + return vqdmlahq_m_n_s16 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlaht.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) { - return vqdmlahq_m (a, b, c, p); + return vqdmlahq_m (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlaht.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c index 361f5d00bdf..a3dab7fa02e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) { - return vqdmlahq_m_n_s32 (a, b, c, p); + return vqdmlahq_m_n_s32 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlaht.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) { - return vqdmlahq_m (a, b, c, p); + return vqdmlahq_m (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlaht.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c index a9eaea89ba4..610580478a3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) { - return vqdmlahq_m_n_s8 (a, b, c, p); + return vqdmlahq_m_n_s8 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlaht.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) { - return vqdmlahq_m (a, b, c, p); + return vqdmlahq_m (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlaht.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c index c109dd47444..210bacec2fb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo (int16x8_t a, int16x8_t b, int16_t c) +foo (int16x8_t add, int16x8_t m1, int16_t m2) { - return vqdmlahq_n_s16 (a, b, c); + return vqdmlahq_n_s16 (add, m1, m2); } -/* { dg-final { scan-assembler "vqdmlah.s16" } } */ +/* +**foo1: +** ... +** vqdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo1 (int16x8_t a, int16x8_t b, int16_t c) +foo1 (int16x8_t add, int16x8_t m1, int16_t m2) { - return vqdmlahq (a, b, c); + return vqdmlahq (add, m1, m2); } -/* { dg-final { scan-assembler "vqdmlah.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c index 752d9d9e3e0..dbb2494b216 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, int32_t c) +foo (int32x4_t add, int32x4_t m1, int32_t m2) { - return vqdmlahq_n_s32 (a, b, c); + return vqdmlahq_n_s32 (add, m1, m2); } -/* { dg-final { scan-assembler "vqdmlah.s32" } } */ +/* +**foo1: +** ... +** vqdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, int32_t c) +foo1 (int32x4_t add, int32x4_t m1, int32_t m2) { - return vqdmlahq (a, b, c); + return vqdmlahq (add, m1, m2); } -/* { dg-final { scan-assembler "vqdmlah.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c index 8dffa0e1852..a7962f82d38 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo (int8x16_t a, int8x16_t b, int8_t c) +foo (int8x16_t add, int8x16_t m1, int8_t m2) { - return vqdmlahq_n_s8 (a, b, c); + return vqdmlahq_n_s8 (add, m1, m2); } -/* { dg-final { scan-assembler "vqdmlah.s8" } } */ +/* +**foo1: +** ... +** vqdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo1 (int8x16_t a, int8x16_t b, int8_t c) +foo1 (int8x16_t add, int8x16_t m1, int8_t m2) { - return vqdmlahq (a, b, c); + return vqdmlahq (add, m1, m2); } -/* { dg-final { scan-assembler "vqdmlah.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c index 7c2e5cf89dd..34d407f0142 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlasht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) { - return vqdmlashq_m_n_s16 (a, b, c, p); + return vqdmlashq_m_n_s16 (m1, m2, add, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlasht.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlasht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) { - return vqdmlashq_m (a, b, c, p); + return vqdmlashq_m (m1, m2, add, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlasht.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c index cea9d9b683f..50a665ea7e5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlasht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) { - return vqdmlashq_m_n_s32 (a, b, c, p); + return vqdmlashq_m_n_s32 (m1, m2, add, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlasht.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlasht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) { - return vqdmlashq_m (a, b, c, p); + return vqdmlashq_m (m1, m2, add, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlasht.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c index 83ee258876a..45f34b60382 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlasht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) { - return vqdmlashq_m_n_s8 (a, b, c, p); + return vqdmlashq_m_n_s8 (m1, m2, add, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlasht.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmlasht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) { - return vqdmlashq_m (a, b, c, p); + return vqdmlashq_m (m1, m2, add, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmlasht.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c index c71a61c54f6..a3f1ae8d6b8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo (int16x8_t a, int16x8_t b, int16_t c) +foo (int16x8_t m1, int16x8_t m2, int16_t add) { - return vqdmlashq_n_s16 (a, b, c); + return vqdmlashq_n_s16 (m1, m2, add); } -/* { dg-final { scan-assembler "vqdmlash.s16" } } */ +/* +**foo1: +** ... +** vqdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo1 (int16x8_t a, int16x8_t b, int16_t c) +foo1 (int16x8_t m1, int16x8_t m2, int16_t add) { - return vqdmlashq (a, b, c); + return vqdmlashq (m1, m2, add); } -/* { dg-final { scan-assembler "vqdmlash.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c index 61f6c6671cc..cf867e56874 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, int32_t c) +foo (int32x4_t m1, int32x4_t m2, int32_t add) { - return vqdmlashq_n_s32 (a, b, c); + return vqdmlashq_n_s32 (m1, m2, add); } -/* { dg-final { scan-assembler "vqdmlash.s32" } } */ +/* +**foo1: +** ... +** vqdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, int32_t c) +foo1 (int32x4_t m1, int32x4_t m2, int32_t add) { - return vqdmlashq (a, b, c); + return vqdmlashq (m1, m2, add); } -/* { dg-final { scan-assembler "vqdmlash.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c index a07892863c1..7e9362cab60 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo (int8x16_t a, int8x16_t b, int8_t c) +foo (int8x16_t m1, int8x16_t m2, int8_t add) { - return vqdmlashq_n_s8 (a, b, c); + return vqdmlashq_n_s8 (m1, m2, add); } -/* { dg-final { scan-assembler "vqdmlash.s8" } } */ +/* +**foo1: +** ... +** vqdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo1 (int8x16_t a, int8x16_t b, int8_t c) +foo1 (int8x16_t m1, int8x16_t m2, int8_t add) { - return vqdmlashq (a, b, c); + return vqdmlashq (m1, m2, add); } -/* { dg-final { scan-assembler "vqdmlash.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file