[25/35] arm: improve tests and fix vmlaldavaxq*
Commit Message
gcc/ChangeLog:
* config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
(mve_vmlaldavaxq_s<mode>, mve_vmlaldavaxq_p_<supf><mode>): Fix
spacing vs tabs.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Improve tests.
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
---
gcc/config/arm/mve.md | 6 ++--
.../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 32 +++++++++++++++----
.../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 32 +++++++++++++++----
.../arm/mve/intrinsics/vmlaldavaxq_s16.c | 24 ++++++++++----
.../arm/mve/intrinsics/vmlaldavaxq_s32.c | 24 ++++++++++----
5 files changed, 91 insertions(+), 27 deletions(-)
Comments
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 25/35] arm: improve tests and fix vmlaldavaxq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
> (mve_vmlaldavaxq_s<mode>, mve_vmlaldavaxq_p_<supf><mode>):
> Fix
> spacing vs tabs.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Improve
> tests.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> gcc/config/arm/mve.md | 6 ++--
> .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 32 +++++++++++++++----
> .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 32 +++++++++++++++----
> .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 24 ++++++++++----
> .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 24 ++++++++++----
> 5 files changed, 91 insertions(+), 27 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 714dc6fc7ce..d2ffae6a425 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -4163,7 +4163,7 @@ (define_insn "mve_vmlaldavaq_<supf><mode>"
> VMLALDAVAQ))
> ]
> "TARGET_HAVE_MVE"
> - "vmlaldava.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
> + "vmlaldava.<supf>%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
> [(set_attr "type" "mve_move")
> ])
>
> @@ -4179,7 +4179,7 @@ (define_insn "mve_vmlaldavaxq_s<mode>"
> VMLALDAVAXQ_S))
> ]
> "TARGET_HAVE_MVE"
> - "vmlaldavax.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
> + "vmlaldavax.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
> [(set_attr "type" "mve_move")
> ])
>
> @@ -6126,7 +6126,7 @@ (define_insn
> "mve_vmlaldavaxq_p_<supf><mode>"
> VMLALDAVAXQ_P))
> ]
> "TARGET_HAVE_MVE"
> - "vpst\;vmlaldavaxt.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
> + "vpst\;vmlaldavaxt.<supf>%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
> [(set_attr "type" "mve_move")
> (set_attr "length""8")])
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
> index f33d3880236..87f0354a636 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+,
> q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64_t
> -foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
> +foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
> {
> - return vmlaldavaxq_p_s16 (a, b, c, p);
> + return vmlaldavaxq_p_s16 (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+,
> q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64_t
> -foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
> +foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
> {
> - return vmlaldavaxq_p (a, b, c, p);
> + return vmlaldavaxq_p (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
> index ab072a9850e..d26bf5b90af 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+,
> q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64_t
> -foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
> +foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
> {
> - return vmlaldavaxq_p_s32 (a, b, c, p);
> + return vmlaldavaxq_p_s32 (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+,
> q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64_t
> -foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
> +foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
> {
> - return vmlaldavaxq_p (a, b, c, p);
> + return vmlaldavaxq_p (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
> index e68fbd2df94..3a37e7a58a9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:
> @.*|)
> +** ...
> +*/
> int64_t
> -foo (int64_t a, int16x8_t b, int16x8_t c)
> +foo (int64_t add, int16x8_t m1, int16x8_t m2)
> {
> - return vmlaldavaxq_s16 (a, b, c);
> + return vmlaldavaxq_s16 (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavax.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:
> @.*|)
> +** ...
> +*/
> int64_t
> -foo1 (int64_t a, int16x8_t b, int16x8_t c)
> +foo1 (int64_t add, int16x8_t m1, int16x8_t m2)
> {
> - return vmlaldavaxq (a, b, c);
> + return vmlaldavaxq (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavax.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
> index 7b6fea289da..155b8be70f0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:
> @.*|)
> +** ...
> +*/
> int64_t
> -foo (int64_t a, int32x4_t b, int32x4_t c)
> +foo (int64_t add, int32x4_t m1, int32x4_t m2)
> {
> - return vmlaldavaxq_s32 (a, b, c);
> + return vmlaldavaxq_s32 (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavax.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:
> @.*|)
> +** ...
> +*/
> int64_t
> -foo1 (int64_t a, int32x4_t b, int32x4_t c)
> +foo1 (int64_t add, int32x4_t m1, int32x4_t m2)
> {
> - return vmlaldavaxq (a, b, c);
> + return vmlaldavaxq (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavax.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
@@ -4163,7 +4163,7 @@ (define_insn "mve_vmlaldavaq_<supf><mode>"
VMLALDAVAQ))
]
"TARGET_HAVE_MVE"
- "vmlaldava.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
+ "vmlaldava.<supf>%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
[(set_attr "type" "mve_move")
])
@@ -4179,7 +4179,7 @@ (define_insn "mve_vmlaldavaxq_s<mode>"
VMLALDAVAXQ_S))
]
"TARGET_HAVE_MVE"
- "vmlaldavax.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
+ "vmlaldavax.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
[(set_attr "type" "mve_move")
])
@@ -6126,7 +6126,7 @@ (define_insn "mve_vmlaldavaxq_p_<supf><mode>"
VMLALDAVAXQ_P))
]
"TARGET_HAVE_MVE"
- "vpst\;vmlaldavaxt.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
+ "vpst\;vmlaldavaxt.<supf>%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
-foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
+foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
{
- return vmlaldavaxq_p_s16 (a, b, c, p);
+ return vmlaldavaxq_p_s16 (add, m1, m2, p);
}
-/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
-foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
+foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
{
- return vmlaldavaxq_p (a, b, c, p);
+ return vmlaldavaxq_p (add, m1, m2, p);
}
-/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
-foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
+foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
{
- return vmlaldavaxq_p_s32 (a, b, c, p);
+ return vmlaldavaxq_p_s32 (add, m1, m2, p);
}
-/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
-foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
+foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
{
- return vmlaldavaxq_p (a, b, c, p);
+ return vmlaldavaxq_p (add, m1, m2, p);
}
-/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
-foo (int64_t a, int16x8_t b, int16x8_t c)
+foo (int64_t add, int16x8_t m1, int16x8_t m2)
{
- return vmlaldavaxq_s16 (a, b, c);
+ return vmlaldavaxq_s16 (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmlaldavax.s16" } } */
+/*
+**foo1:
+** ...
+** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
-foo1 (int64_t a, int16x8_t b, int16x8_t c)
+foo1 (int64_t add, int16x8_t m1, int16x8_t m2)
{
- return vmlaldavaxq (a, b, c);
+ return vmlaldavaxq (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmlaldavax.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
@@ -1,21 +1,33 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+/*
+**foo:
+** ...
+** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
-foo (int64_t a, int32x4_t b, int32x4_t c)
+foo (int64_t add, int32x4_t m1, int32x4_t m2)
{
- return vmlaldavaxq_s32 (a, b, c);
+ return vmlaldavaxq_s32 (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmlaldavax.s32" } } */
+/*
+**foo1:
+** ...
+** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
-foo1 (int64_t a, int32x4_t b, int32x4_t c)
+foo1 (int64_t add, int32x4_t m1, int32x4_t m2)
{
- return vmlaldavaxq (a, b, c);
+ return vmlaldavaxq (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmlaldavax.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file