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[62.178.148.172]) by smtp.gmail.com with ESMTPSA id ku3-20020a170907788300b007ae21bbdd3fsm2361281ejc.162.2022.11.13.15.05.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Nov 2022 15:05:29 -0800 (PST) From: Christoph Muellner To: gcc-patches@gcc.gnu.org, Kito Cheng , Jim Wilson , Palmer Dabbelt , Andrew Waterman , Philipp Tomsich , Jeff Law , Vineet Gupta Cc: =?utf-8?q?Christoph_M=C3=BCllner?= Subject: [PATCH 5/7] riscv: Use by-pieces to do overlapping accesses in block_move_straight Date: Mon, 14 Nov 2022 00:05:19 +0100 Message-Id: <20221113230521.712693-6-christoph.muellner@vrull.eu> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221113230521.712693-1-christoph.muellner@vrull.eu> References: <20221113230521.712693-1-christoph.muellner@vrull.eu> MIME-Version: 1.0 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_MANYTO, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: Christoph Müllner The current implementation of riscv_block_move_straight() emits a couple of load-store pairs with maximum width (e.g. 8-byte for RV64). The remainder is handed over to move_by_pieces(), which emits code based target settings like slow_unaligned_access and overlap_op_by_pieces. move_by_pieces() will emit overlapping memory accesses with maximum width only if the given length exceeds the size of one access (e.g. 15-bytes for 8-byte accesses). This patch changes the implementation of riscv_block_move_straight() such, that it preserves a remainder within the interval [delta..2*delta) instead of [0..delta), so that overlapping memory access may be emitted (if the requirements for them are given). gcc/ChangeLog: * config/riscv/riscv-string.c (riscv_block_move_straight): Adjust range for emitted load/store pairs. Signed-off-by: Christoph Müllner --- gcc/config/riscv/riscv-string.cc | 8 ++++---- .../gcc.target/riscv/memcpy-overlapping.c | 19 ++++++++----------- 2 files changed, 12 insertions(+), 15 deletions(-) diff --git a/gcc/config/riscv/riscv-string.cc b/gcc/config/riscv/riscv-string.cc index 6882f0be269..1137df475be 100644 --- a/gcc/config/riscv/riscv-string.cc +++ b/gcc/config/riscv/riscv-string.cc @@ -57,18 +57,18 @@ riscv_block_move_straight (rtx dest, rtx src, unsigned HOST_WIDE_INT length) delta = bits / BITS_PER_UNIT; /* Allocate a buffer for the temporary registers. */ - regs = XALLOCAVEC (rtx, length / delta); + regs = XALLOCAVEC (rtx, length / delta - 1); /* Load as many BITS-sized chunks as possible. Use a normal load if the source has enough alignment, otherwise use left/right pairs. */ - for (offset = 0, i = 0; offset + delta <= length; offset += delta, i++) + for (offset = 0, i = 0; offset + 2 * delta <= length; offset += delta, i++) { regs[i] = gen_reg_rtx (mode); riscv_emit_move (regs[i], adjust_address (src, mode, offset)); } /* Copy the chunks to the destination. */ - for (offset = 0, i = 0; offset + delta <= length; offset += delta, i++) + for (offset = 0, i = 0; offset + 2 * delta <= length; offset += delta, i++) riscv_emit_move (adjust_address (dest, mode, offset), regs[i]); /* Mop up any left-over bytes. */ @@ -166,7 +166,7 @@ riscv_expand_block_move (rtx dest, rtx src, rtx length) if (hwi_length <= (RISCV_MAX_MOVE_BYTES_STRAIGHT / factor)) { - riscv_block_move_straight (dest, src, INTVAL (length)); + riscv_block_move_straight (dest, src, hwi_length); return true; } else if (optimize && align >= BITS_PER_WORD) diff --git a/gcc/testsuite/gcc.target/riscv/memcpy-overlapping.c b/gcc/testsuite/gcc.target/riscv/memcpy-overlapping.c index ffb7248bfd1..ef95bfb879b 100644 --- a/gcc/testsuite/gcc.target/riscv/memcpy-overlapping.c +++ b/gcc/testsuite/gcc.target/riscv/memcpy-overlapping.c @@ -25,26 +25,23 @@ COPY_N(15) /* Emits 2x {ld,sd} and 1x {lw,sw}. */ COPY_N(19) -/* Emits 3x ld and 3x sd. */ +/* Emits 3x {ld,sd}. */ COPY_N(23) /* The by-pieces infrastructure handles up to 24 bytes. So the code below is emitted via cpymemsi/block_move_straight. */ -/* Emits 3x {ld,sd} and 1x {lhu,lbu,sh,sb}. */ +/* Emits 3x {ld,sd} and 1x {lw,sw}. */ COPY_N(27) -/* Emits 3x {ld,sd} and 1x {lw,lbu,sw,sb}. */ +/* Emits 4x {ld,sd}. */ COPY_N(29) -/* Emits 3x {ld,sd} and 2x {lw,sw}. */ +/* Emits 4x {ld,sd}. */ COPY_N(31) -/* { dg-final { scan-assembler-times "ld\t" 21 } } */ -/* { dg-final { scan-assembler-times "sd\t" 21 } } */ +/* { dg-final { scan-assembler-times "ld\t" 23 } } */ +/* { dg-final { scan-assembler-times "sd\t" 23 } } */ -/* { dg-final { scan-assembler-times "lw\t" 5 } } */ -/* { dg-final { scan-assembler-times "sw\t" 5 } } */ - -/* { dg-final { scan-assembler-times "lbu\t" 2 } } */ -/* { dg-final { scan-assembler-times "sb\t" 2 } } */ +/* { dg-final { scan-assembler-times "lw\t" 3 } } */ +/* { dg-final { scan-assembler-times "sw\t" 3 } } */