From patchwork Tue Nov 8 14:24:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aldy Hernandez X-Patchwork-Id: 60202 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 57B213858417 for ; Tue, 8 Nov 2022 14:25:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 57B213858417 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667917539; bh=FWMU3EqK1lFg6Y5us3APY+b3fLJ6tkmcjfo0e0pXHVc=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=Uf9c0g4cuGuw26gQXc8u7mp8QGguing0lNAzfRij8zUeOPg1nGfkONC/mMOPYOqfi JhD3AEsiJ85XgIyLOsOexBpLncbeNyFsWShVehHqX/zYnjUO/Uw6pRiztggzQMdI7S VQP1emLY55hSvvPTPRbPWZFkSySbtkLbZF/dRV3A= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 726593858C39 for ; Tue, 8 Nov 2022 14:25:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 726593858C39 Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-664-Dvi_E1WHNmC0gW_QlQxKOg-1; Tue, 08 Nov 2022 09:25:05 -0500 X-MC-Unique: Dvi_E1WHNmC0gW_QlQxKOg-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id A1DAF811E7A; Tue, 8 Nov 2022 14:25:05 +0000 (UTC) Received: from abulafia.quesejoda.com (unknown [10.39.192.204]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 42D00140EBF3; Tue, 8 Nov 2022 14:25:05 +0000 (UTC) Received: from abulafia.quesejoda.com (localhost [127.0.0.1]) by abulafia.quesejoda.com (8.17.1/8.17.1) with ESMTPS id 2A8EP2L2862727 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Tue, 8 Nov 2022 15:25:02 +0100 Received: (from aldyh@localhost) by abulafia.quesejoda.com (8.17.1/8.17.1/Submit) id 2A8EP2wf862724; Tue, 8 Nov 2022 15:25:02 +0100 To: GCC patches Cc: Richard Biener , Andrew MacLeod , Aldy Hernandez Subject: [PATCH] CCP: handle division by a power of 2 as a right shift. Date: Tue, 8 Nov 2022 15:24:58 +0100 Message-Id: <20221108142458.862678-1-aldyh@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-11.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Aldy Hernandez via Gcc-patches From: Aldy Hernandez Reply-To: Aldy Hernandez Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" We have some code in range-ops that sets better maybe nonzero bits for TRUNC_DIV_EXPR by a power of 2 than CCP does, by just shifting the mask. I'd like to offload this functionality into the CCP mask tracking code, which already does the right thing for right shifts. The testcase for this change is gcc.dg/tree-ssa/vrp123.c and gcc.dg/tree-ssa/pr107541.c. Tested on x86-64 Linux. OK? gcc/ChangeLog: * range-op.cc (operator_div::fold_range): Call update_known_bitmask. * tree-ssa-ccp.cc (bit_value_binop): Handle divisions by powers of 2 as a right shift. --- gcc/range-op.cc | 18 +----------------- gcc/tree-ssa-ccp.cc | 12 ++++++++++++ 2 files changed, 13 insertions(+), 17 deletions(-) diff --git a/gcc/range-op.cc b/gcc/range-op.cc index 846931ddcae..8ff5d5b4c78 100644 --- a/gcc/range-op.cc +++ b/gcc/range-op.cc @@ -1995,23 +1995,7 @@ operator_div::fold_range (irange &r, tree type, if (!cross_product_operator::fold_range (r, type, lh, rh, trio)) return false; - if (lh.undefined_p ()) - return true; - - tree t; - if (code == TRUNC_DIV_EXPR - && rh.singleton_p (&t) - && !wi::neg_p (lh.lower_bound ())) - { - wide_int wi = wi::to_wide (t); - int shift = wi::exact_log2 (wi); - if (shift != -1) - { - wide_int nz = lh.get_nonzero_bits (); - nz = wi::rshift (nz, shift, TYPE_SIGN (type)); - r.set_nonzero_bits (nz); - } - } + update_known_bitmask (r, code, lh, rh); return true; } diff --git a/gcc/tree-ssa-ccp.cc b/gcc/tree-ssa-ccp.cc index 3a4b6bc1118..2bcd90646f6 100644 --- a/gcc/tree-ssa-ccp.cc +++ b/gcc/tree-ssa-ccp.cc @@ -1934,6 +1934,18 @@ bit_value_binop (enum tree_code code, signop sgn, int width, { widest_int r1max = r1val | r1mask; widest_int r2max = r2val | r2mask; + if (r2mask == 0 && !wi::neg_p (r1max)) + { + widest_int shift = wi::exact_log2 (r2val); + if (shift != -1) + { + // Handle division by a power of 2 as an rshift. + bit_value_binop (RSHIFT_EXPR, sgn, width, val, mask, + r1type_sgn, r1type_precision, r1val, r1mask, + r2type_sgn, r2type_precision, shift, r2mask); + return; + } + } if (sgn == UNSIGNED || (!wi::neg_p (r1max) && !wi::neg_p (r2max))) {