From patchwork Tue Sep 27 14:40:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= X-Patchwork-Id: 58074 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6312B385800D for ; Tue, 27 Sep 2022 14:41:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6312B385800D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1664289675; bh=UeB35Y0sANecg4Sz41Q3/Vg/bI/WM+ZG+QuxfFVAWBw=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=PR91x5ixhHOUfe8noGizM0WjGIM4xf8zq8IpOSANCN6Yj4JkX+jUtIYESd8pPOSX/ Auh7QLSQX1twHX86TIutc3eENsL4U/JhpZcJLsZb5Am5OaigcBDIzOQoy0s0rDEfSp YcdmGKlpKxdsRTMrVSWGRPOjXdq3WX032FjXzC9s= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by sourceware.org (Postfix) with ESMTPS id C2C2B3858C50 for ; Tue, 27 Sep 2022 14:40:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C2C2B3858C50 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28RAmH4K018359; Tue, 27 Sep 2022 16:40:42 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3jsrsjk3yu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Sep 2022 16:40:42 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E298510002A; Tue, 27 Sep 2022 16:40:40 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id BFD8322F7BF; Tue, 27 Sep 2022 16:40:40 +0200 (CEST) Received: from jkgcxl0002.jkg.st.com (10.75.127.118) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 27 Sep 2022 16:40:37 +0200 To: Subject: [PATCH] testsuite: Skip intrinsics test if arm Date: Tue, 27 Sep 2022 16:40:20 +0200 Message-ID: <20220927144019.194796-1-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.75.127.118] X-ClientProxiedBy: GPXDAG2NODE4.st.com (10.75.127.68) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-27_05,2022-09-27_01,2022-06-22_01 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gcc-patches?= From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Cc: richard.sandiford@arm.com Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" In the test cases, it's clearly written that intrinsics are not implemented on arm*. A simple xfail does not help since there are link error and that would cause an UNRESOLVED testcase rather than XFAIL. By changing to dg-skip-if, the entire test case is omitted. gcc/testsuite/ChangeLog: * gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Rephrase to unimplemented. * gcc.target/aarch64/advsimd-intrinsics/vld1x3.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vld1x4.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst1x2.c: Replace dg-xfail-if with dg-skip-if. * gcc.target/aarch64/advsimd-intrinsics/vst1x3.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst1x4.c: Likewise. Co-Authored-By: Yvan ROUX Signed-off-by: Torbjörn SVENSSON --- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c | 2 +- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c | 2 +- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c | 2 +- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c | 2 +- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c | 2 +- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c index f933102be47..0c45a2b227b 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c @@ -1,6 +1,6 @@ /* We haven't implemented these intrinsics for arm yet. */ /* { dg-do run } */ -/* { dg-skip-if "unsupported" { arm*-*-* } } */ +/* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ #include diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c index b20dec061b5..4174dcd064a 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c @@ -1,6 +1,6 @@ /* We haven't implemented these intrinsics for arm yet. */ /* { dg-do run } */ -/* { dg-skip-if "unsupported" { arm*-*-* } } */ +/* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ #include diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c index e59f845880e..89b289bb21d 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c @@ -1,6 +1,6 @@ /* We haven't implemented these intrinsics for arm yet. */ /* { dg-do run } */ -/* { dg-skip-if "unsupported" { arm*-*-* } } */ +/* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ #include diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c index cb13da0caed..6d20a46b8b6 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c @@ -1,6 +1,6 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-xfail-if "" { arm*-*-* } } */ /* { dg-do run } */ +/* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ #include diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c index 3ce272a5007..87eae4d2f35 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c @@ -1,6 +1,6 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-xfail-if "" { arm*-*-* } } */ /* { dg-do run } */ +/* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ #include diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c index 1f17b5342de..829a18ddac0 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c @@ -1,6 +1,6 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-xfail-if "" { arm*-*-* } } */ /* { dg-do run } */ +/* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ #include