From patchwork Fri Sep 23 18:43:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Torbjorn SVENSSON X-Patchwork-Id: 57980 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 44EB03857C49 for ; Fri, 23 Sep 2022 18:44:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 44EB03857C49 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1663958672; bh=ljlan8coI6MM2SKtuvqZBdcZFTWuyrXlyWjmevV7w/0=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=fnTVtirz7TEPemfseSrwMDkt4u3jBJ0Oj4Ya4Mj+HkVpTyhTEMyB2Zq3yzENhJJU4 hCiK4/1/wFlEKvhyoy0xv2vMgqfSoUYwzvcLYTpBk70JPEuC7r9+FYE7XiZX16v5t5 6u6LWnAH1vUtaqP7GZVsSqbWLcSbtdiHta+Rx82M= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by sourceware.org (Postfix) with ESMTPS id BEAD93858C52 for ; Fri, 23 Sep 2022 18:44:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org BEAD93858C52 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28NEvr7n019295 for ; Fri, 23 Sep 2022 20:44:01 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3jrkmxb2xu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 23 Sep 2022 20:44:01 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3BE2C10002A for ; Fri, 23 Sep 2022 20:44:00 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1BE2525AEF5 for ; Fri, 23 Sep 2022 20:44:00 +0200 (CEST) Received: from jkgcxl0002.jkg.st.com (10.75.127.45) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Fri, 23 Sep 2022 20:43:57 +0200 To: Subject: [PATCH] Fix typo in chapter level for RISC-V attributes Date: Fri, 23 Sep 2022 20:43:44 +0200 Message-ID: <20220923184344.4147951-1-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-23_08,2022-09-22_02,2022-06-22_01 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gcc-patches?= From: Torbjorn SVENSSON Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Cc: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" The "RISC-V specific attributes" section should be at the same level as "PowerPC-specific attributes". gcc/ChangeLog: * doc/sourcebuild.texi: Fix chapter level. Signed-off-by: Torbjörn SVENSSON --- gcc/doc/sourcebuild.texi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 760ff9559a6..52357cc7aee 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -2447,7 +2447,7 @@ PowerPC target pre-defines macro _ARCH_PWR9 which means the @code{-mcpu} setting is Power9 or later. @end table -@subsection RISC-V specific attributes +@subsubsection RISC-V specific attributes @table @code