From patchwork Fri Jun 17 13:27:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Earnshaw X-Patchwork-Id: 55167 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9757A3851C13 for ; Fri, 17 Jun 2022 13:28:38 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9757A3851C13 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1655472518; bh=1iRCcCE7P/SVpWPUfpQbxhKSbFLGSqhPp4OhIbWKkQ4=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=QPmO4Jv0pfauXAhO7ZFoYuTIlcLGuFTD6L34EYqLs56l9Y3Wc6a/NTI4pk3gMsOkk Sil3BgZR7B1Bukujl0qhLFBfauGxKUVnOmOddoPwB5uRS9WatDk3VM8X+wfDIMP379 JgC4IgydxaxBRRXZO/nr7BXEfn2Eyu5axlBYpDOU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 0E9A73857344 for ; Fri, 17 Jun 2022 13:28:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0E9A73857344 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8E54111FB; Fri, 17 Jun 2022 06:28:08 -0700 (PDT) Received: from e126323.arm.com (unknown [10.57.41.51]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E43D33F7D8; Fri, 17 Jun 2022 06:28:07 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [committed] arm: fix checking ICE in arm_print_operand [PR106004] Date: Fri, 17 Jun 2022 14:27:49 +0100 Message-Id: <20220617132749.568321-1-rearnsha@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-20.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Earnshaw via Gcc-patches From: Richard Earnshaw Reply-To: Richard Earnshaw Cc: Richard Earnshaw Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Sigh, another instance where I incorrectly used XUINT instead of UINTVAL. I've also made the code here a little more robust (although I think this case can't in fact be reached) if the 32-bit clear mask includes bit 31. This case, if reached, would print out an out-of-range value based on the size of the compiler's HOST_WIDE_INT type due to sign-extension. We avoid this by masking the value after inversion. gcc/ChangeLog: PR target/106004 * config/arm/arm.cc (arm_print_operand, case 'V'): Use UINTVAL. Clear bits in the mask above bit 31. --- gcc/config/arm/arm.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index 2925907b436..33fb98d5cad 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -24199,7 +24199,8 @@ arm_print_operand (FILE *stream, rtx x, int code) return; } - unsigned HOST_WIDE_INT val = ~XUINT (x, 0); + unsigned HOST_WIDE_INT val + = ~UINTVAL (x) & HOST_WIDE_INT_UC (0xffffffff); int lsb = exact_log2 (val & -val); asm_fprintf (stream, "#%d, #%d", lsb, (exact_log2 (val + (val & -val)) - lsb));